DDDDRM

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samer.a24
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DRAM Dynamic random-access memory (DRAM) is a type of random-access memory that stores each bit of data in a separate capacitor within an integrated circuit. The capacitor can be either charged or discharged; these two states are taken to represent the two values of a bit, conventionally called 0 and 1.
DRAM Structure • Capacitor connected by pass transistor • Bit stored as charge value on capacitor • Voltage on word line ascertains transistor is open or close • Word line and bit line connected to multiple cells
READ – turn on access transistor – charge on Cs is redistributed on the bit line capacitance, Cbit – this will change the bit line voltage, Vbit – which is amplified to read a 1 or 0
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