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Resumen del Recurso

Pregunta 1

Pregunta
1. What is not a main structural element of a computer system?
Respuesta
  • ● Operating system
  • ● System Bus
  • ● I/O Modules
  • ● Main Memory
  • ● Processor

Pregunta 2

Pregunta
2. Which of the following registers are used by the processor to exchange data with memory?
Respuesta
  • ● I/OAR and I/OBR
  • ● Program status word
  • ● PC and IR
  • ● MAR and MBR

Pregunta 3

Pregunta
3. Which of the following registers are used by the processor to exchange data with input/output module?
Respuesta
  • ● I/OAR and I/OBR
  • ● Program status word
  • ● PC and IR
  • ● MAR and MBR

Pregunta 4

Pregunta
4. Which of the following element of a computer system controls the operation of the computer and performs its data processing functions?
Respuesta
  • ● Processor
  • ● I/O modules
  • ● Main memory
  • ● System bus

Pregunta 5

Pregunta
5. Which of the following element of a computer system stores data and programs?
Respuesta
  • ● I/O modules
  • ● Processor
  • ● System bus
  • ● Main memory

Pregunta 6

Pregunta
6. Which of the following provides for communication among elements of a computer system?
Respuesta
  • ● I/O modules
  • ● Processor
  • ● System bus
  • ● Main memory

Pregunta 7

Pregunta
7. Which of the following element of a computer system moves data between the computer and its external environment?
Respuesta
  • ● I/O modules
  • ● System bus
  • ● Processor
  • ● Main memory

Pregunta 8

Pregunta
8. The processor contains a single data register, called
Respuesta
  • ● AC
  • ● IR
  • ● PC
  • ● PSW

Pregunta 9

Pregunta
9. This register specifies a particular input/output device
Respuesta
  • ● I/OBR
  • ● Memory buffer register
  • ● I/OAR
  • ● Memory address register

Pregunta 10

Pregunta
10. This register is used for the exchange of data between an I/O module and the processor
Respuesta
  • ● I/OBR
  • ● Memory buffer register
  • ● I/OAR
  • ● Memory address register

Pregunta 11

Pregunta
11. This register contains the data to be written into memory or which receives the data read from memory
Respuesta
  • ● I/OBR
  • ● memory address register
  • ● memory buffer register
  • ● I/OAR

Pregunta 12

Pregunta
12. This register specifies the location in memory for the next read or write
Respuesta
  • ● I/OBR
  • ● Memory buffer register
  • ● I/OAR
  • ● Memory address register

Pregunta 13

Pregunta
13. Index register, segment register, and stack register are example of:
Respuesta
  • ● Address register
  • ● Memory register
  • Memory buffer register
  • Memory quality register

Pregunta 14

Pregunta
14. Which register contains the address of the next instruction to be fetched?
Respuesta
  • ● process counter
  • ● program counter
  • ● execution register
  • ● instruction register

Pregunta 15

Pregunta
15. Which register contains the instruction most recently fetched?
Respuesta
  • ● process counter
  • ● program counter
  • ● execution register
  • ● instruction register

Pregunta 16

Pregunta
16. Which register contains condition codes set by the processor hardware as the result of operations?
Respuesta
  • ● Stack pointer
  • ● Program status word
  • ● Accumulator
  • ● Program counter

Pregunta 17

Pregunta
17. The figure 1.4. 1. What is the address of the instruction that is being executed?
Image:
17a (binary/octet-stream)
Respuesta
  • 301
  • ● 941
  • ● 302
  • ● 940

Pregunta 18

Pregunta
17.2. What is the address of the instruction that is being executed?
Image:
17b (binary/octet-stream)
Respuesta
  • 301
  • ● 941
  • ● 302
  • ● 940

Pregunta 19

Pregunta
17.3. What is the address of the instruction that is being executed?
Image:
17c (binary/octet-stream)
Respuesta
  • ● 301
  • ● 941
  • ● 302
  • ● 940

Pregunta 20

Pregunta
17.4. What is the address of the instruction that will be executed next?
Image:
17d (binary/octet-stream)
Respuesta
  • 301
  • ● 941
  • ● 302
  • ● 940

Pregunta 21

Pregunta
17.5. Instruction in the IR will:
Image:
17e (binary/octet-stream)
Respuesta
  • Load 3 to AC from the memory
  • ● Add 2 to AC from the memory
  • ● Store 3 to AC from the memory
  • ● Add 3 to AC from the memory

Pregunta 22

Pregunta
17.6. Instruction in the IR will:
Image:
17f (binary/octet-stream)
Respuesta
  • ● Load 3 to AC from the memory
  • ● Add 2 to AC from the memory
  • ● Store 3 to AC from the memory
  • ● Add 3 to AC from the memory

Pregunta 23

Pregunta
17.7. Instruction in the IR will:
Image:
17g (binary/octet-stream)
Respuesta
  • ● Store content of AC to the memory
  • ● Add 3 to the memory location from AC
  • ● Store 5 to AC from the memory
  • ● Add 2 to the memory location from AC

Pregunta 24

Pregunta
17.8. What is the memory location of the data that is addressed in the instruction?
Image:
17h (binary/octet-stream)
Respuesta
  • ● 301
  • ● 941
  • ● 302
  • ● 940

Pregunta 25

Pregunta
17.9. What is the memory location of the data that is addressed in the instruction?
Image:
17k (binary/octet-stream)
Respuesta
  • 301
  • ● 941
  • ● 302
  • ● 940

Pregunta 26

Pregunta
17.10. What is the memory location of the data that is addressed in the instruction?
Image:
17l (binary/octet-stream)
Respuesta
  • ● 301
  • ● 941
  • ● 302
  • ● 940

Pregunta 27

Pregunta
18. The fetched instruction is loaded into the
Respuesta
  • ● PC
  • ● Memory
  • ● Accumulator
  • ● IR

Pregunta 28

Pregunta
19. At the beginning of each instruction cycle, the processor fetches an instruction from the memory. The address of the instruction is held in
Respuesta
  • ● PC
  • ● MAR
  • ● MBR
  • ● IR

Pregunta 29

Pregunta
20. The processor is executing ‘Load AC from memory’ instruction. Choose the correct micro-instructions:
Respuesta
  • ● PC -> MAR M -> MBR MBR -> IR IR -> MBR M -> MAR MAR -> AC
  • ● PC -> MAR M -> MBR MBR -> IR IR -> MAR M -> MBR MBR -> AC
  • ● PC -> MBR M -> MAR MAR -> IR IR -> MAR M -> MBR MBR -> AC
  • ● PC -> MAR M -> MBR MBR -> AC IR -> MAR M -> MBR MBR -> AC

Pregunta 30

Pregunta
21.1 Choose the micro-instructions that reflect instruction execution stage shown in the figure below: (четыре вопроса в одном)четыре вопроса в одном))
Image:
1 (binary/octet-stream)
Respuesta
  • ● PC -> MAR 303 M -> MBR 2941 MBR -> IR 2941
  • ● IR -> MAR 2941 AC -> MBR 0005 MBR -> M 0005
  • ● IR -> MAR 941 AC -> MBR 0005 MBR -> M 0005
  • ● IR -> MAR 303 M -> MBR 0005 MBR -> M 0005

Pregunta 31

Pregunta
21.2 Choose true version?
Image:
2 (binary/octet-stream)
Respuesta
  • ● IR -> MAR 941 M -> MBR 0002 MBR ->AC 0005
  • ● PC -> MAR 302 M -> MBR 2941 MBR -> IR 2941
  • ● IR -> MAR 941 M -> MBR 0002 MBR -> AC 0002
  • ● PC -> MAR 301 M -> I/OBR 5941 I/OBR 5941

Pregunta 32

Pregunta
21.3 Choose true version?
Image:
3 (binary/octet-stream)
Respuesta
  • PC -> MAR 301 M -> MBR 6941 MBR -> IR 5941
  • ● IR -> MAR 941 AC -> MBR 0003 MBR -> M 0003
  • ● IR -> MAR 941 M -> MBR 0002 MBR -> AC 0002
  • ● PC -> MAR 301 M -> MBR 5941 MBR -> IR 5941

Pregunta 33

Pregunta
Choose true version?
Image:
4 (binary/octet-stream)
Respuesta
  • ● PC -> MAR 300 M -> MAR 1940 MBR -> IR 1940
  • ● PC -> MAR 300 M -> MBR 1940 MBR -> IR 1940
  • ● M -> MAR 300 M -> MBR 1940 MBR -> IR 1940
  • ● PC -> MAR 301 M -> MBR 1940 MBR -> IR 1940

Pregunta 34

Pregunta
22. When an I/O device completes an I/O operation, the device issues an interrupt signal to the processor and then:
Respuesta
  • ● The processor finishes execution of the current instruction before responding to the interrupt
  • ● The processor saves information needed to resume the current program at the point if interrupt
  • ● The processor loads the program counter with the entry location of the interrupt-handling routine
  • ● The processor stops execution of the current instruction without finishing it and responds to the interrupt

Pregunta 35

Pregunta
23. When the time required for the I/O operation is less that the time to complete the execution of instructions between write operations in the user program, it is:
Respuesta
  • ● Short I/O wait
  • ● Long I/O wait
  • ● Slow I/O wait
  • ● Fast I/O wait

Pregunta 36

Pregunta
24. When the time required for the I/O operation will take much more time than executing a sequence of user instructions, it is:
Respuesta
  • ● Short I/O wait
  • ● Fast I/O wait
  • ● Long I/O wait
  • ● Slow I/O wait

Pregunta 37

Pregunta
25. Most I/O devices are:
Respuesta
  • ● much slower than the processor
  • ● much processor than the slower
  • both

Pregunta 38

Pregunta
26. If there no interrupts, after each write operation, the processor must:?????
Respuesta
  • ● Pause and remain idle until the I/O operation finishes
  • ● Save the PSW and PC onto control stack
  • ● Finish execution of current instruction
  • ● Load new PC value

Pregunta 39

Pregunta
27. The processor determined that there is a pending interrupt and sent an acknowledgement signal to the device that issued the interrupt. Then, the processor:
Respuesta
  • The processor tests for a pending interrupt request, determines that there is one, and sends an acknowledgment signal to the device that issued the interrupt.The acknowledgment allows the device to remove its interrupt signal
  • жай гана ана сурактты зубри и все) Удачи

Pregunta 40

Pregunta
28. The figure 1.5, 1.8, 1.9, 1.12, 1.13, 1.14, 1.19: (четыре вопроса в одном)м)ного вопросов в одном)) 1. The following figure demonstrates:
Image:
5 (binary/octet-stream)
Respuesta
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Pregunta 41

Pregunta
28,2. The following figure demonstrates:
Image:
6 (binary/octet-stream)
Respuesta
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Pregunta 42

Pregunta
28,3. The following figure demonstrates:
Image:
7 (binary/octet-stream)
Respuesta
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Pregunta 43

Pregunta
28,4. The figure a) demonstrates the program timing diagram for:
Image:
8 (binary/octet-stream)
Respuesta
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Pregunta 44

Pregunta
28,5. The figure b) demonstrates the program timing diagram for
Image:
9 (binary/octet-stream)
Respuesta
  • ● Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Pregunta 45

Pregunta
28,6. The figure a) demonstrates the program timing diagram for:
Image:
10 (binary/octet-stream)
Respuesta
  • ● Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Pregunta 46

Pregunta
28,7. The figure b) demonstrates the program timing diagram for
Image:
11 (binary/octet-stream)
Respuesta
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Pregunta 47

Pregunta
28,8. The figure below shows
Image:
12 (binary/octet-stream)
Respuesta
  • Parallel interrupt processing
  • ● Nested interrupt processing
  • ● Sequential interrupt processing
  • ● Parent-child interrupt processing

Pregunta 48

Pregunta
28,9. The figure below shows
Image:
13 (binary/octet-stream)
Respuesta
  • Parallel interrupt processing
  • ● Nested interrupt processing
  • ● Sequential interrupt processing
  • ● Parent-child interrupt processing

Pregunta 49

Pregunta
28,10. The figure below shows
Image:
14 (binary/octet-stream)
Respuesta
  • Parallel interrupt processing
  • ● Nested interrupt processing
  • ● Sequential interrupt processing
  • ● Time Sequence of Multiple Interrupts

Pregunta 50

Pregunta
28,11. As one goes down the memory hierarchy
Image:
15 (binary/octet-stream)
Respuesta
  • ● increasing frequency of access to the memory by the processor
  • ● increasing capacity
  • ● decreasing access time
  • ● increasing cost per bit

Pregunta 51

Pregunta
28,12. The given flowchart is an example of:
Image:
16 (binary/octet-stream)
Respuesta
  • ● Manual memory access
  • ● Programmed I/O
  • ● Interrupt-driven I/O
  • ● Direct memory access (DMA)

Pregunta 52

Pregunta
28,13. The given flowchart is an example of:
Image:
17 (binary/octet-stream)
Respuesta
  • ● Manual memory access
  • ● Programmed I/O
  • ● Interrupt-driven I/O
  • ● Direct memory access (DMA)

Pregunta 53

Pregunta
28,14. The given flowchart is an example of:
Image:
18 (binary/octet-stream)
Respuesta
  • ● Manual memory access
  • ● Programmed I/O
  • ● Interrupt-driven I/O
  • ● Direct memory access (DMA)

Pregunta 54

Pregunta
29. Complete the relationship concerning the memory systems: faster access time –
Respuesta
  • ● smaller cost per bit
  • ● faster access speed
  • ● greater cost per bit
  • ● lower capacity

Pregunta 55

Pregunta
30. Complete the relationship concerning the memory systems: greater capacity –
Respuesta
  • ● smaller cost per bit
  • ● faster access speed
  • ● greater cost per bit
  • ● lower capacity

Pregunta 56

Pregunta
31. Complete the relationship concerning the memory systems: greater capacity –
Respuesta
  • ● faster access speed
  • ● greater cost per bit
  • ● slower access time
  • ● lower capacity

Pregunta 57

Pregunta
33. The smaller, more expensive, faster memory is:
Respuesta
  • ● Register
  • ● Main memory
  • ● Cache
  • ● Disk drive

Pregunta 58

Pregunta
34. If the accessed word is found in the faster memory, that is defined as a:
Respuesta
  • ● evrika
  • ● hit
  • ● win
  • ● bingo

Pregunta 59

Pregunta
35. If the accessed word is not found in the faster memory, that is defined as a:
Respuesta
  • ● Loss
  • ● zero
  • ● miss
  • ● ricochet

Pregunta 60

Pregunta
36. This type of memory is nonvolatile:
Respuesta
  • ● Main memory
  • ● Cache
  • ● Secondary memory
  • ● Register
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