DDDDRM

Descripción

DDF
samer.a24
Fichas por samer.a24, actualizado hace más de 1 año
samer.a24
Creado por samer.a24 hace casi 12 años
23
0

Resumen del Recurso

Pregunta Respuesta
DRAM Dynamic random-access memory (DRAM) is a type of random-access memory that stores each bit of data in a separate capacitor within an integrated circuit. The capacitor can be either charged or discharged; these two states are taken to represent the two values of a bit, conventionally called 0 and 1.
DRAM Structure • Capacitor connected by pass transistor • Bit stored as charge value on capacitor • Voltage on word line ascertains transistor is open or close • Word line and bit line connected to multiple cells
READ – turn on access transistor – charge on Cs is redistributed on the bit line capacitance, Cbit – this will change the bit line voltage, Vbit – which is amplified to read a 1 or 0
Mostrar resumen completo Ocultar resumen completo