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hoffa HOFFMAN
Quiz por hoffa HOFFMAN, atualizado more than 1 year ago
hoffa HOFFMAN
Criado por hoffa HOFFMAN mais de 4 anos atrás
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Resumo de Recurso

Questão 1

Questão
1. What is not a main structural element of a computer system?
Responda
  • ● Operating system
  • ● System Bus
  • ● I/O Modules
  • ● Main Memory
  • ● Processor

Questão 2

Questão
2. Which of the following registers are used by the processor to exchange data with memory?
Responda
  • ● I/OAR and I/OBR
  • ● Program status word
  • ● PC and IR
  • ● MAR and MBR

Questão 3

Questão
3. Which of the following registers are used by the processor to exchange data with input/output module?
Responda
  • ● I/OAR and I/OBR
  • ● Program status word
  • ● PC and IR
  • ● MAR and MBR

Questão 4

Questão
4. Which of the following element of a computer system controls the operation of the computer and performs its data processing functions?
Responda
  • ● Processor
  • ● I/O modules
  • ● Main memory
  • ● System bus

Questão 5

Questão
5. Which of the following element of a computer system stores data and programs?
Responda
  • ● I/O modules
  • ● Processor
  • ● System bus
  • ● Main memory

Questão 6

Questão
6. Which of the following provides for communication among elements of a computer system?
Responda
  • ● I/O modules
  • ● Processor
  • ● System bus
  • ● Main memory

Questão 7

Questão
7. Which of the following element of a computer system moves data between the computer and its external environment?
Responda
  • ● I/O modules
  • ● System bus
  • ● Processor
  • ● Main memory

Questão 8

Questão
8. The processor contains a single data register, called
Responda
  • ● AC
  • ● IR
  • ● PC
  • ● PSW

Questão 9

Questão
9. This register specifies a particular input/output device
Responda
  • ● I/OBR
  • ● Memory buffer register
  • ● I/OAR
  • ● Memory address register

Questão 10

Questão
10. This register is used for the exchange of data between an I/O module and the processor
Responda
  • ● I/OBR
  • ● Memory buffer register
  • ● I/OAR
  • ● Memory address register

Questão 11

Questão
11. This register contains the data to be written into memory or which receives the data read from memory
Responda
  • ● I/OBR
  • ● memory address register
  • ● memory buffer register
  • ● I/OAR

Questão 12

Questão
12. This register specifies the location in memory for the next read or write
Responda
  • ● I/OBR
  • ● Memory buffer register
  • ● I/OAR
  • ● Memory address register

Questão 13

Questão
13. Index register, segment register, and stack register are example of:
Responda
  • ● Address register
  • ● Memory register
  • Memory buffer register
  • Memory quality register

Questão 14

Questão
14. Which register contains the address of the next instruction to be fetched?
Responda
  • ● process counter
  • ● program counter
  • ● execution register
  • ● instruction register

Questão 15

Questão
15. Which register contains the instruction most recently fetched?
Responda
  • ● process counter
  • ● program counter
  • ● execution register
  • ● instruction register

Questão 16

Questão
16. Which register contains condition codes set by the processor hardware as the result of operations?
Responda
  • ● Stack pointer
  • ● Program status word
  • ● Accumulator
  • ● Program counter

Questão 17

Questão
17. The figure 1.4. 1. What is the address of the instruction that is being executed?
Responda
  • 301
  • ● 941
  • ● 302
  • ● 940

Questão 18

Questão
17.2. What is the address of the instruction that is being executed?
Responda
  • 301
  • ● 941
  • ● 302
  • ● 940

Questão 19

Questão
17.3. What is the address of the instruction that is being executed?
Responda
  • ● 301
  • ● 941
  • ● 302
  • ● 940

Questão 20

Questão
17.4. What is the address of the instruction that will be executed next?
Responda
  • 301
  • ● 941
  • ● 302
  • ● 940

Questão 21

Questão
17.5. Instruction in the IR will:
Responda
  • Load 3 to AC from the memory
  • ● Add 2 to AC from the memory
  • ● Store 3 to AC from the memory
  • ● Add 3 to AC from the memory

Questão 22

Questão
17.6. Instruction in the IR will:
Responda
  • ● Load 3 to AC from the memory
  • ● Add 2 to AC from the memory
  • ● Store 3 to AC from the memory
  • ● Add 3 to AC from the memory

Questão 23

Questão
17.7. Instruction in the IR will:
Responda
  • ● Store content of AC to the memory
  • ● Add 3 to the memory location from AC
  • ● Store 5 to AC from the memory
  • ● Add 2 to the memory location from AC

Questão 24

Questão
17.8. What is the memory location of the data that is addressed in the instruction?
Responda
  • ● 301
  • ● 941
  • ● 302
  • ● 940

Questão 25

Questão
17.9. What is the memory location of the data that is addressed in the instruction?
Responda
  • 301
  • ● 941
  • ● 302
  • ● 940

Questão 26

Questão
17.10. What is the memory location of the data that is addressed in the instruction?
Responda
  • ● 301
  • ● 941
  • ● 302
  • ● 940

Questão 27

Questão
18. The fetched instruction is loaded into the
Responda
  • ● PC
  • ● Memory
  • ● Accumulator
  • ● IR

Questão 28

Questão
19. At the beginning of each instruction cycle, the processor fetches an instruction from the memory. The address of the instruction is held in
Responda
  • ● PC
  • ● MAR
  • ● MBR
  • ● IR

Questão 29

Questão
20. The processor is executing ‘Load AC from memory’ instruction. Choose the correct micro-instructions:
Responda
  • ● PC -> MAR M -> MBR MBR -> IR IR -> MBR M -> MAR MAR -> AC
  • ● PC -> MAR M -> MBR MBR -> IR IR -> MAR M -> MBR MBR -> AC
  • ● PC -> MBR M -> MAR MAR -> IR IR -> MAR M -> MBR MBR -> AC
  • ● PC -> MAR M -> MBR MBR -> AC IR -> MAR M -> MBR MBR -> AC

Questão 30

Questão
21.1 Choose the micro-instructions that reflect instruction execution stage shown in the figure below: (четыре вопроса в одном)четыре вопроса в одном))
Responda
  • ● PC -> MAR 303 M -> MBR 2941 MBR -> IR 2941
  • ● IR -> MAR 2941 AC -> MBR 0005 MBR -> M 0005
  • ● IR -> MAR 941 AC -> MBR 0005 MBR -> M 0005
  • ● IR -> MAR 303 M -> MBR 0005 MBR -> M 0005

Questão 31

Questão
21.2 Choose true version?
Responda
  • ● IR -> MAR 941 M -> MBR 0002 MBR ->AC 0005
  • ● PC -> MAR 302 M -> MBR 2941 MBR -> IR 2941
  • ● IR -> MAR 941 M -> MBR 0002 MBR -> AC 0002
  • ● PC -> MAR 301 M -> I/OBR 5941 I/OBR 5941

Questão 32

Questão
21.3 Choose true version?
Responda
  • PC -> MAR 301 M -> MBR 6941 MBR -> IR 5941
  • ● IR -> MAR 941 AC -> MBR 0003 MBR -> M 0003
  • ● IR -> MAR 941 M -> MBR 0002 MBR -> AC 0002
  • ● PC -> MAR 301 M -> MBR 5941 MBR -> IR 5941

Questão 33

Questão
Choose true version?
Responda
  • ● PC -> MAR 300 M -> MAR 1940 MBR -> IR 1940
  • ● PC -> MAR 300 M -> MBR 1940 MBR -> IR 1940
  • ● M -> MAR 300 M -> MBR 1940 MBR -> IR 1940
  • ● PC -> MAR 301 M -> MBR 1940 MBR -> IR 1940

Questão 34

Questão
22. When an I/O device completes an I/O operation, the device issues an interrupt signal to the processor and then:
Responda
  • ● The processor finishes execution of the current instruction before responding to the interrupt
  • ● The processor saves information needed to resume the current program at the point if interrupt
  • ● The processor loads the program counter with the entry location of the interrupt-handling routine
  • ● The processor stops execution of the current instruction without finishing it and responds to the interrupt

Questão 35

Questão
23. When the time required for the I/O operation is less that the time to complete the execution of instructions between write operations in the user program, it is:
Responda
  • ● Short I/O wait
  • ● Long I/O wait
  • ● Slow I/O wait
  • ● Fast I/O wait

Questão 36

Questão
24. When the time required for the I/O operation will take much more time than executing a sequence of user instructions, it is:
Responda
  • ● Short I/O wait
  • ● Fast I/O wait
  • ● Long I/O wait
  • ● Slow I/O wait

Questão 37

Questão
25. Most I/O devices are:
Responda
  • ● much slower than the processor
  • ● much processor than the slower
  • both

Questão 38

Questão
26. If there no interrupts, after each write operation, the processor must:?????
Responda
  • ● Pause and remain idle until the I/O operation finishes
  • ● Save the PSW and PC onto control stack
  • ● Finish execution of current instruction
  • ● Load new PC value

Questão 39

Questão
27. The processor determined that there is a pending interrupt and sent an acknowledgement signal to the device that issued the interrupt. Then, the processor:
Responda
  • The processor tests for a pending interrupt request, determines that there is one, and sends an acknowledgment signal to the device that issued the interrupt.The acknowledgment allows the device to remove its interrupt signal
  • жай гана ана сурактты зубри и все) Удачи

Questão 40

Questão
28. The figure 1.5, 1.8, 1.9, 1.12, 1.13, 1.14, 1.19: (четыре вопроса в одном)м)ного вопросов в одном)) 1. The following figure demonstrates:
Responda
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Questão 41

Questão
28,2. The following figure demonstrates:
Responda
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Questão 42

Questão
28,3. The following figure demonstrates:
Responda
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Questão 43

Questão
28,4. The figure a) demonstrates the program timing diagram for:
Responda
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Questão 44

Questão
28,5. The figure b) demonstrates the program timing diagram for
Responda
  • ● Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Questão 45

Questão
28,6. The figure a) demonstrates the program timing diagram for:
Responda
  • ● Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Questão 46

Questão
28,7. The figure b) demonstrates the program timing diagram for
Responda
  • Interrupts; fast I/O wait
  • ● Interrupts; short I/O wait
  • ● Interrupts; long I/O wait
  • ● No interrupts
  • ● Interrupts; slow I/O wait

Questão 47

Questão
28,8. The figure below shows
Responda
  • Parallel interrupt processing
  • ● Nested interrupt processing
  • ● Sequential interrupt processing
  • ● Parent-child interrupt processing

Questão 48

Questão
28,9. The figure below shows
Responda
  • Parallel interrupt processing
  • ● Nested interrupt processing
  • ● Sequential interrupt processing
  • ● Parent-child interrupt processing

Questão 49

Questão
28,10. The figure below shows
Responda
  • Parallel interrupt processing
  • ● Nested interrupt processing
  • ● Sequential interrupt processing
  • ● Time Sequence of Multiple Interrupts

Questão 50

Questão
28,11. As one goes down the memory hierarchy
Responda
  • ● increasing frequency of access to the memory by the processor
  • ● increasing capacity
  • ● decreasing access time
  • ● increasing cost per bit

Questão 51

Questão
28,12. The given flowchart is an example of:
Responda
  • ● Manual memory access
  • ● Programmed I/O
  • ● Interrupt-driven I/O
  • ● Direct memory access (DMA)

Questão 52

Questão
28,13. The given flowchart is an example of:
Responda
  • ● Manual memory access
  • ● Programmed I/O
  • ● Interrupt-driven I/O
  • ● Direct memory access (DMA)

Questão 53

Questão
28,14. The given flowchart is an example of:
Responda
  • ● Manual memory access
  • ● Programmed I/O
  • ● Interrupt-driven I/O
  • ● Direct memory access (DMA)

Questão 54

Questão
29. Complete the relationship concerning the memory systems: faster access time –
Responda
  • ● smaller cost per bit
  • ● faster access speed
  • ● greater cost per bit
  • ● lower capacity

Questão 55

Questão
30. Complete the relationship concerning the memory systems: greater capacity –
Responda
  • ● smaller cost per bit
  • ● faster access speed
  • ● greater cost per bit
  • ● lower capacity

Questão 56

Questão
31. Complete the relationship concerning the memory systems: greater capacity –
Responda
  • ● faster access speed
  • ● greater cost per bit
  • ● slower access time
  • ● lower capacity

Questão 57

Questão
33. The smaller, more expensive, faster memory is:
Responda
  • ● Register
  • ● Main memory
  • ● Cache
  • ● Disk drive

Questão 58

Questão
34. If the accessed word is found in the faster memory, that is defined as a:
Responda
  • ● evrika
  • ● hit
  • ● win
  • ● bingo

Questão 59

Questão
35. If the accessed word is not found in the faster memory, that is defined as a:
Responda
  • ● Loss
  • ● zero
  • ● miss
  • ● ricochet

Questão 60

Questão
36. This type of memory is nonvolatile:
Responda
  • ● Main memory
  • ● Cache
  • ● Secondary memory
  • ● Register

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