Loading [MathJax]/jax/output/HTML-CSS/fonts/TeX/fontdata.js
shen0109
Quiz by , created more than 1 year ago

CMOS Logic Gate

129
0
0
shen0109
Created by shen0109 about 9 years ago
Rate this resource by clicking on the stars below:
1 2 3 4 5 (0)
Ratings (0)
0
0
0
0
0

0 comments

There are no comments, be the first and leave one below:

Close

CMOS Logic Gate

Question 1 of 3 Question 1 of 3

1

Select from the dropdown lists to complete the text.

CMOS Logic Circuit consists of two networks, one Pull Down Network (PDN) and, one Pull Up Network (PUN). PDN are constructed of ( nMOS, pMOS ) while PUN of ( pMOS, nMOS ). ( PDN, PUN ) will conduct for all input combinations that require a low output and will pull output to ground while ( PUN, PDN ) is OFF.

Explanation

Question 2 of 3 Question 2 of 3

1

Which logic gate is shown in the picture

Select one of the following:

  • NOR Gate

  • Transmission Gate

  • NAND Gate

Explanation

Question 3 of 3 Question 3 of 3

1

Which logic gate is shown in the picture

Select one of the following:

  • NAND Gate

  • NOR Gate

  • Transmission Gate

Explanation