Gate-Level Minimization

Gate-Level Minimization

1. Don't-Care Conditions

2. Implementation

   • NAND - NOR Implementation
   • NAND - NAND Implementation
   • NOR - NOR Implementation
   • Two Level Implementations
     • Degenerate Forms
     • Non-Denegerate Forms

3. The K-Map Method

4. Tabular Summary and Examples

5. Hardware Description Language

   • Module Declaration
   • Gate Delays
   • Boolean Expressions
   • User-Defined Primitives

Imágenes y archivos del mapa