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| Question | Answer |
| What are the x86 processor’s three basic modes of operation? | Protected Mode, Virtual-8086 mode, Real-Address Mode |
| Describe Protected Mode | Is the native state of the processor, in this mode everything is available to be used. Each program is in a separate memory area. This memory areas are known as segments and the processor restrings the programs to their specific areas. |
| Describe Virtual-8086 mode | this a mode that works with the protected mode allowing the computer to run different programs, this programs can be MS-DOS programs that use real-address mode and in the case of a crash, this crash doesn’t affect other programs in the processor. |
| Describe Real-address mode | This mode implements the programming environment of the intel 8086 processor with some other features, this allows the processor to switch between modes. In this mode any problem with a code can cause the operating system to crash. |
| Name the 8 32-bit general-porpose registers | EAX, EBX, ECX, EDX, EBP, ESP, ESI, EDI |
| What does EAX do ? | automatically used for multiplication and division instruct ions, also called the extended accumulator register. |
| What does EBX and EDX do ? | usually used for arithmetic operations with no preference to any operation. |
| What does ECX do ? | automatically used as a loop counter |
| What does ESP do ? | ESP: the most common use of this register is to make data transfers. Also call ed the extended stack pointer register. |
| what does ESI and EDI does ? | ESI and EDI: are used by high-speed memory transfer instructions. |
| What does EBP do ? | EBP: is used by high-level languages to reference function parameters and local variables on the stack. It should not be used for ordinary arithmetic or data transfer except at an advanced level of programming. It is often called the extended frame pointer register. |
| What is the Instruction Pointer ? | EBP: is used by high-level languages to reference function parameters and local variables on the stack. It should not be used for ordinary arithmetic or data transfer except at an advanced level of programming. It is often called the extended frame pointer register. |
| What does EFLAGS Register do? | EFLAGS Register: The EFLAGS or just Flags register is composed by a group of individual binary bits that control the operation of the CPU or can give us information about its behavior. |
| Name all 6 segment registers | CS, SS, DS, ES, FS and GS |
| Describe CS | Contains de code segment initial 16bit address |
| Describe DS | Contains the initial 16 bit address of data segment |
| Describe SS | Contains the 16 bit stack segment address |
| Describe ES, FS and GS | can point to alternate data segments, that is, segments that supplement the default data segment |
| Besides the stack pointer (ESP), what other register points to variables on the stack? | EBP when used by a high-level language. |
| Name at least four CPU status flags. | Carry, Overflow, Sign, Zero |
| Which flag is set when the result of an unsigned arithmetic operation is too large to fit into the destination? | carry flag |
| Which flag is set when the result of a signed arithmetic operation is either too large or too small to fit into the destination? | overflow flag |
| Which flag is set when an arithmetic or logical operation generates a negative result? | sign flag |
| Which part of the CPU performs floating-point arithmetic? | Floating point unit |
| How many bits long are the FPU data registers? | 80bit |
| Which Intel processor was the first member of the IA-32 family? | The intel 80386 processor. |
| Which Intel processor first introduced superscalar execution? | The intel Pentium processor |
| Which Intel processor first used MMX technology? | The Pentium used a 32-bit address bus and a 64-bit internal data path, and introduced MMX technology to the IA-32 family |
| Describe the CISC design approach. The instruction set is large, and includes a wide variety of memory-add ressing, shifting, arithmetic, data movement, and logical operations. Complex instructions require a rel atively long time to decode and execute | The instruction set is large, and includes a wide variety of memory-add ressing, shifting, arithmetic, data movement, and logical operations. Complex instructions require a relatively long time to decode and execute |
| Describe the RISC design approach. | A RISC consists of a relatively small number of short, simple instructions that execute relatively quickly. Rather than using a microcode interpreter to decode and execute machine instructions, a RISC processor directly decodes and executes instructions using hardware. |
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