CPU

ANDRES DONOSO DIAZ
Mind Map by ANDRES DONOSO DIAZ, updated more than 1 year ago
ANDRES DONOSO DIAZ
Created by ANDRES DONOSO DIAZ almost 5 years ago
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computer science - CPU
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Resource summary

CPU
1 Central Processing Unit
1.1 chip that does all of the calculations
1.2 three mayor parts
1.2.1 Control Unit (CU)
1.2.1.1 acts as
1.2.1.1.1 organizing force
1.2.1.2 does not execute instructions
1.2.1.3 controls sequence of execution
1.2.1.4 controls what is stored in the cache
1.2.1.5 takes care of fetching and decoding
1.2.1.6 works with special registers
1.2.1.6.1 Instruction Register (IR)
1.2.1.6.1.1 holds instruction currently being executed
1.2.1.6.2 Program Counter (PC)
1.2.1.6.2.1 contains address of the next instruction to be executed
1.2.1.6.3 Memory Data Register (MDR)
1.2.1.6.3.1 contains the data to be stored in the computer storage, or the data after a fetch from the computer storage
1.2.1.6.3.2 Connected to data bus
1.2.1.6.3.3 data can go both ways
1.2.1.6.3.3.1 to and from memory
1.2.1.6.3.4 can load its data from
1.2.1.6.3.4.1 Data bus
1.2.1.6.3.4.1.1 reading data
1.2.1.6.3.4.2 CPU registers
1.2.1.6.3.4.2.1 storing data
1.2.1.6.3.5
1.2.1.6.4 Memory Address Register (MAR)
1.2.1.6.4.1 stores memory address from which data will be fetched, sent or stored
1.2.1.6.4.2 holds memory location of data that needs to be accessed
1.2.1.6.4.3 enable communication between the memory and processing unit
1.2.1.7 uses buses to transfer information to the ALU and the CPU
1.2.2 Arithmetic and Logic Unit (ALU)
1.2.2.1 performs
1.2.2.1.1 arithmetic operations
1.2.2.1.1.1 adding
1.2.2.1.1.2 dividing
1.2.2.1.1.3 substracting
1.2.2.1.1.4 multiplying
1.2.2.1.2 logical operations
1.2.2.1.2.1 AND
1.2.2.1.2.2 OR
1.2.2.1.2.3 NOT
1.2.3 Primary memory
1.2.3.1 cache
1.2.3.1.1 frequently used instructions are stored here
1.2.3.2 connects with ALU and CU
2 uses buses to transfer information
2.1 address
2.1.1 addresses of locations in the primary memory are transferred
2.1.2 transferred with data bus
2.2 data
2.2.1 contains
2.2.1.1 information
2.2.1.2 instructions
2.3 connected to each other by a collection of wires
3 MACHINE CYCLE
3.1 1) Fetch
3.1.1 involves retrieving an instruction from memory
3.1.1.1
3.2 2) Decode
3.2.1 instructions is broken up into parts
3.2.1.1 CU
3.3 3) execute
3.3.1 execute is performed
3.3.1.1
3.4 4) writeback
3.4.1 outputs the result to some form of memory
3.4.1.1 ALU
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