IC Target Technology

Bill Mans
Mind Map by Bill Mans, updated more than 1 year ago
Bill Mans
Created by Bill Mans about 6 years ago
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IC Target Technology
  1. FPGA
    1. advantages
      1. small,fast and easy to create small project,agility,reduce the cost of project design,less delay
      2. disadvantages
        1. very hard to study, expensive than commercial chip
        2. cost
          1. it depend on the project, but in China it costs only 500 yuan(70-80 euro)
          2. software support
            1. quartus maxplus ISE
            2. time to market
              1. for a small project such as student number detector about one mouth
              2. power consumption
                1. 5V DC power can let it work(less power consumption)
                2. adaptability
                  1. it can be used to adapt all the electric device if you want to
                  2. basic hardware format
                    1. SRAM
                  3. CPLD
                    1. advantages
                      1. good logic power, less cost in project,less developing time,less delay
                      2. disadvantages
                        1. it is not a good ideal for CPLD to create large project
                        2. cost
                          1. about 200 yuan(20-30 euro) in China
                          2. software support
                            1. quartus maxplus ISE
                            2. time to market
                              1. if the project is not too large, it takes less than one mouth to market
                              2. power consumption
                                1. less power consumption
                                2. adaptability
                                  1. it can be used to adapt all the electric device if you want to
                                  2. basic hardware format
                                    1. and or gate
                                  3. Mass gate arrays
                                    1. advantage
                                      1. fast, the signal chip costs less(but in the beginning costs more), it can be used for a long time
                                      2. disadvantage
                                        1. it requires more time to develop, more money to develop the chip,can not be progessed
                                        2. cost
                                          1. at the begning we should spend more money in it
                                          2. software support
                                            1. Synopsys, Cadence, electric
                                            2. time to market
                                              1. much longer than FPGA and CPLD, sometime several years
                                              2. power consumption
                                                1. less
                                                2. adaptability
                                                  1. not very good, it can only be used to the fixed area
                                                  2. basic hardware format
                                                    1. die
                                                  3. Standard cell
                                                    1. advantage
                                                      1. we can use the disign several time without redesign them, and it make the deign more queality and effective
                                                      2. disadvantage
                                                        1. it is a brand new technology and it still have time for this technology to develop,still can not program the standard cell
                                                        2. cost
                                                          1. less than mass gate arrays
                                                          2. software support
                                                            1. electric
                                                            2. time to market
                                                              1. less than mass gate arrays
                                                              2. power consumption
                                                                1. less
                                                                2. adaptability
                                                                  1. better than mass gate array but if only in design time, when it come to the chip it's adaptability is also very poor
                                                                  2. basic hardware format
                                                                    1. in side is logic gates, outside is standard cell(a module which can realize some function)
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