Quiz
os 9
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Fragen in diesem Quiz (25)
1Absolute code can be generated for ____.
- Acompile-time binding
- Bload-time binding
- Cexecution-time binding
- Dinterrupt binding
2_____ is the method of binding instructions and data to memory performed by most generalpurpose operating systems.
- AInterrupt binding
- BCompile time binding
- CExecution time binding
- DLoad-time binding
3An address generated by a CPU is referred to as a ____.
- Aphysical address
- Blogical address
- Cpost relocation register address
- DMemory-Management Unit (MMU) generated address
4Suppose a program is operating with execution-time binding and the physical address generated is 300. The relocation register is set to 100. What is the corresponding logical address?
- A199
- B201
- C200
- D300
5The mapping of a logical address to a physical address is done in hardware by the ________.
- Amemory-management-unit (MMU)
- Bmemory address register
- Crelocation register
- Ddynamic loading register
6In a dynamically linked library, ____.
- Aloading is postponed until execution time
- Bsystem language libraries are treated like any other object module
- Cmore disk space is used than in a statically linked library
- Da stub is included in the image for each library-routine reference
7The _____ binding scheme facilitates swapping.
- Ainterrupt time
- Bload time
- Cassembly time
- Dexecution time
8The roll out, roll in variant of swapping is used ____.
- Awhen a backing store is not necessary
- Bfor the round-robin scheduling algorithm
- Cfor priority-based scheduling algorithms
- Dwhen the load on the system has temporarily been reduced
9_____ is the dynamic storage-allocation algorithm which results in the smallest leftover hole in memory.
- AFirst fit
- BBest fit
- CWorst fit
- DNone of the above
10_____ is the dynamic storage-allocation algorithm which results in the largest leftover hole in memory.
- AFirst fit
- BBest fit
- CWorst fit
- DNone of the above
11Which of the following is true of compaction?
- AIt can be done at assembly, load, or execution time.
- BIt is used to solve the problem of internal fragmentation.
- CIt cannot shuffle memory contents.
- DIt is possible only if relocation is dynamic and done at execution time.
12A(n) ____ page table has one page entry for each real page (or frame) of memory.
- Ainverted
- Bclustered
- Cforward-mapped
- Dvirtual
13Consider a logical address with a page size of 8 KB. How many bits must be used to represent the page offset in the logical address?
- A10
- B8
- C13
- D12
14Consider a logical address with 18 bits used to represent an entry in a conventional page table. How many entries are in the conventional page table?
- A262144
- B1024
- C1048576
- D18
15Assume a system has a TLB hit ratio of 90%. It requires 15 nanoseconds to access the TLB, and 85 nanoseconds to access main memory. What is the effective memory access time in nanoseconds for this system?
- A108.5
- B100
- C22
- D176.5
16Given the logical address 0xAEF9 (in hexadecimal) with a page size of 256 bytes, what is the page number?
- A0xAE
- B0xF9
- C0xA
- D0x00F9
17Given the logical address 0xAEF9 (in hexadecimal) with a page size of 256 bytes, what is the page offset?
- A0xAE
- B0xF9
- C0xA
- D0xF900
18Consider a 32-bit address for a two-level paging system with an 8 KB page size. The outer page table has 1024 entries. How many bits are used to represent the second-level page table?
- A10
- B8
- C12
- D9
19With segmentation, a logical address consists of _____.
- Asegment number and offset
- Bsegment name and offset
- Csegment number and page number
- Dsegment table and segment number
20Which of the following data structures is appropriate for placing into its own segment?
- Aheap
- Bkernel code and data
- Cuser code and data
- Dall of the above
21Assume the value of the base and limit registers are 1200 and 350 respectively. Which of the following addresses is legal?
- A355
- B1200
- C1551
- Dall of the above
22A(n) ______ matches the process with each entry in the TLB.
- Aaddress-space identifier
- Bprocess id
- Cstack
- Dpage number
23Which of the following statements are true with respect to hashed page tables?
- AThey only work for sparse address spaces.
- BThe virtual address is used to hash into the hash table.
- CA common approach for handling address spaces larger than 32 bits.
- DHash table collisions do not occur because of the importance of paging.
24Which of the following statements regarding the ARM architecture are false?
- AThere are essentially four different page ranging from 4-KB to 16-MB in size.
- BThere are two different levels of TLB.
- COne or two level paging may be used.
- DThe micro TLB must be flushed at each context switch.
25Which of the following is not a reason explaining why mobile devices generally do not support swapping?
- ALimited space constraints of flash memory.
- BSmall size of mobile applications do not require use of swap space.
- CLimited number of writes of flash memory.
- DPoor throughput between main memory and flash memory.
Informationen
- Beschreibung
- Quiz am os 9, erstellt von Adam Whiteside am 24/04/2019.
- Autor
- Adam Whiteside
- Sprache
- English
- Aufrufe
- 38
- Bewertung
- Noch keine Bewertungen Bewerte dieses Quiz