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3.3.3: Computer architectures

Adam Cook Computing A-Level Englisch 5,0Durchschnittliche Bewertung 5,0 von 5 (1 Bewertung)

3.3.3: Computer architectures

Inhalt der Mindmap

3.3.3: Computer architectures

  1. Von Neumann

    • Takes each instruction serially
    • Performs each instruction before carrying out the next.
    • Instructions and data stored together in memory
  2. FETCH

    • 1: PC holds address of next instruction to be executed
    • 2: Address is copied to the MAR
    • 3: Data in address at MAR is copied to MDR
    • 4: Contents of MDR copied to CIR
    • 5: Contents of PC are incremented
  3. DECODE

    • 6: Contents of CIR divided into code for operation to be carried out and the address that the data will be used by
    • 7: Control Unit interprets the code so that the processor knows what to do next.
  4. EXECUTE

    • 8: Address is copied from the CIR to the MAR
    • 9: Data found in the MAR is copied to the MDR
    • 10: Data is used
  5. Types of processor

    • Co-processor
      • Additonal processor for a specific task (such as a GPU)
      • Most co-processors do not fetch instructions for themselves
    • Parallel Processor
      • With Fetch - Decode - Execute cycle
        • A processor for each step of the Fetch - Decode - Execute cycle
        • Speeds up process as next instruction can be fetched before current instruction has finished processing.
      • With Pipelining
        • One main processor that splits jobs up into tasks and farms each tasks to other processors
        • Main Processor Fetches and Decodes task and splits execution into individual tasks and sends to other processors to execute.
    • Array processor
      • Multiple processors compute mathematics on arrays of numbers simultaneously.
      • Numbers are all fetched and then executed simultaneously.
    • Advantages and Disadvantages of Alternative Processors
      • Advantages
        • Faster Processing
        • More than one instruction can be executed at the same time
        • Different processors can handle different parts of the same job.
      • Disadvantages
        • Requires processors to be synced together
        • Program has to be written to use multiple processors
        • Programs are more complex to write, test and debug.
  6. CISC vs RISC

    • CISC
      • Every computer operation has an instruction
      • Each operation has a binary code (Op-Code) associated with it
      • Complex Instruction Set
      • More bits needed to represent each instruction
    • RISC
      • Reduced Instruction Set
        • Typically used in handheld devices
      • Recognises fewer instructions
      • Less bits needed to represent instructions
      • Missing instructions made up with programming techniques
      • Less complex circuitry
      • Op-code and address allocated same number of bits
      • Registers are all the same size

Bilder und Dateien der Mindmap

  • 3.3.3: Computer architectures
  • 3.3.3: Computer architectures
  • 3.3.3: Computer architectures
  • 3.3.3: Computer architectures
  • 3.3.3: Computer architectures
  • 3.3.3: Computer architectures
  • 3.3.3: Computer architectures

Informationen

Beschreibung
Mind map for A2 Computing Master Mind Map *FINISHED*
Erstellt von
Adam Cook
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Bewertung
Durchschnittliche Bewertung 5,0 von 5 (1 Bewertung)

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