Mindmap
CHAPTER 5:BUS SYSTEMS
Inhalt der Mindmap
CHAPTER 5:BUS SYSTEMS
DATA BUS
- -A path for moving data among system modules
- -The width of the data bus is a key factor in determining overall system performances.
ADDRESS BUS
- -Used to designate the source of destination on the data bus.
- -Carries addresses from register to memory
CONTROL BUS
- -Control signals transmits command and timing information among system modules
- -Timing signals indicate validity of data and address information
- -Command signals specify operations to be performed
INTERNAL AND EXTERNAL BUSES
- INTERNAL BUS
- -Located within a CPU chip for communication among the components in CPU chip
- EXTERNAL BUS
- -Supported by third party hardware and software
- INTERNAL BUS
BUS HIERARCHY
- Processor Bus
- bus that the chipset uses to send information to and from the processor.
- Cache Bus
- bus for accessing the system cache.
- Memory Bus
- Second-level system bus that connects the memory subsystem to the chipset and the processor
- Local I/O Bus
- High-speed input/output bus used for connecting performance-critical peripherals to the memory, chipset, and processor.
- Standard I/O Bus
- Used for slower peripherals (mice, modems, regular sound cards, low-speed networking) and also for compatibility with older devices
- Processor Bus
CHARACTERISTICS OF BUS
- Bus width
- Number of bit that can travel in parallel down the bus
- Bus speed
- It reflects how many bits of information can be sent accros wire each second
- Bus bandwidth
- total amount of data that can theoretically be transferred on the bus in a given unit of time.
- Bus width
PERIPHERAL COMPONENT INTERCONNECT(PCI)
- A popular high bandwidth, processor independent bus that can function as a mezzanine or peripheral bus
- Delivers better system performance for high speed I/O subsystems
- PCI Special Interest Group (SIG)
- PCI Express (PCIe)
Informationen
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- Mindmap am CHAPTER 5:BUS SYSTEMS, erstellt von rivetha raman am 22/01/2018.
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- rivetha raman
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