Mindmap
Bus System
Inhalt der Mindmap
Bus System
Bus Interconnection
- Control Bus
- Control the access and the use of the data
- SIGNAL:Indicate validity of data and address information(Timing Signals) Specify operations to be performed(Command Signal)
- Control the access and the use of the data
- Address Bus
- 1. Designate the source or destination of the data
- 2. Width determine the maximum possible memory capacity of the system
- 1. Designate the source or destination of the data
- Data Bus
- Providing path for moving data among system modules
- Number of bits can be transferred at a time based on the number time
- The wider width, the better the performance
- Number of bits can be transferred at a time based on the number time
- Providing path for moving data among system modules
- Control Bus
Informationen
- Beschreibung
- Mindmap am Bus System, erstellt von LAU CHUN GUAN Unknown am 15/01/2019.
- Erstellt von
- LAU CHUN GUAN Unknown
- Aufrufe
- 0
- Verlauf
-
- Erstellt von LEE TZE CHEAN Unknown · 14 Jan 2019
- Kopiert von LAU CHUN GUAN Unknown · 15 Jan 2019
- Bewertung