Ch-2 Microprocessor and its Architecture

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Internal Microprocessor Architecture

8086-Core 2 Microprocessor

Programming Model:

Program visible

Registers used during application programming and specified by instructions

Other registers are program invisible

Not addressable directly during applications programming but may be used indirectly during system programming.

80286 and above

Control and operate protected memory

64-bit extension (R appended)

80386-Core2 has 32-bit internal architecture

80286, 8086, 8088 are 16-bit but upward-compatible to 80386-Core2

8-bit registers are:

AH, AL, BH, BL, CH, CL, DH. DL

16-bit registers are:

AX, BX, CX, DX, SP, BP, DI, SI, IP, FLAGS, CS, DS, ES, SS, FS, GS

The ones ending with X are made of their corresponding H and L 8-bit registers.

32-bit extended registers are same as 16-bit registers with an appended E. E.g. EAX, EBX but not for FS and GS

These are only available in 80386 and above

Multipurpose registers are:

EAX, EBX, ECX, EDX, EBP, EDI, ESI

Registers R8 through R15 are also 64-bit addressed as a byte, word, double-word or quad-word but only the rightmost 8-bits are the byte.

These don’t have provision to access bits 8-15

AH, BH, ... (legacy high bit registers) can't be accessed in the same instruction with R8-R15 because legacy softwares don’t access R8-R15

RNB access the byte in the register where N is the number from 8-15.

RNW accesses the word.

RND accesses the double-word.

RN for the whole 64-bit

Multipurpose Registers:

R#X = E#X, #X (#H & #L)

General Purpose

RAX (Accumulator) :

Used for multiplication, division, or adjustment.

In 80386 and above, EAX may hold the offset address of a location in the memory

In Pentium4 and Core2, RAX holds the offset address allowing IT(terra) byte of the memory to be accessed through a 40-bit address bus.

RBX (Base Index) : Holds the offset address of a location in the memory for all versions.

RCX (Count):

Holds count for various instructions like repeated string(CX), shift and rotate (CL), loop instructions(CX or ECX or RCX).​​​​​​​

In 80386 and above, ECX may hold the offset address of a location in the memory

In Pentium4, RCX holds the offset address.

RDX (Data):

​​​​​​​Holds a part of the result from a multiplication or part of the dividend before a division.

In 80386 and above, it may also address memory data

RBP (Base Pointer): Points to a memory location in all versions for memory data transfers.

RDI ( Destination Index) : Addresses string destination data for the string instructions.

RSI ( Source index): Addresses source string data for the string instructions.

R8 - R15 : Only found in Pentium4 and Core2 if 64-bit extensions are enabled. Only used if 64-bit processors are common.

Special-Purpose registers:

RIP (Instruction Pointer):

Addresses the next instruction in a section of memory defined as a code segment.

IP in real mode and EIP in protected mode.

Only in 80286 and above.

Points to the next instruction in a program.

Can be modified with a jump or a call instruction.

In 64-bit mode, it contains a 40-bit address at present to address a IT flat address space.

RSP (Stack Pointer):

Addresses an area of memory called the stack.

Stack memory stores data through this pointer.

RFLAGS:

Indicate the condition of the microprocessor and control its operation.

The rightmost five flag bits and the overflow flag change after many arithmetic and logic instructions execute.

The flags never change for any data transfer or program control operation.

also used to control features found in the microprocessor.

RFLAGS:

C (carry) :

Holds the carry after addition or borrow after subtraction

Also indicates error conditions especially for DOS function calls.

P ( parity):

Logic 0 for odd parity and logic 1 for even parity.

Parity is the count of ones in a number expressed as even or odd.

Was implemented in early Intel microprocessors for checking data in data communication environment but now data communications equipment is used.

A (auxiliary carry):

holds the half carry after addition or subtraction between bit positions 3 and 4 of the result.

Tested by the DAA and DAS instructions to adjust the value of AL after a BCD addition or subtraction.

Z (zero): Shows if result of an operation is 0.

S (sign) : holds the arithmetic sign of the result.1 for negative.

T (trap):

enables trapping through an on-chip debugging feature.

Flow interrupted if 1.

I (interrupt):

Controls the operation of the INTR (interrupt request) input pin.

Its state is controlled by the STI (set I flag)and CLI (clear I flag)

D (direction) :

Selects either the increment or the decrement mode for the DI or SI during string instructions.

0 for increment.

Set with STD and cleared with CLD instruction.

O(Overflow):

Occurs when signed numbers are added or subtracted.

indicates exceeding capacity.

IOPL (I/O privilege level):

Used in protected mode to select the privilege level for I/O devices.

I/O only executes if current level is higher. Else interrupt occurs.

00 is highest and 11 is lowest.

NT ( nested task):

indicates that the current task is nested within another task in protected mode.

Set when the task is nested

RF ( resume): Used with debugging to control the resumption of execution after the next instruction.

VM(virtual mode):

Selects virtual mode operation in protected mode system.

Allows multiple DOS memory partitions that are 1M byte in length to coexist in memory thus multiple DOS programs can execute.

Used to simulate DOS in modern windows.

AC ( alignment check) :

activates if a word or a doubleword is addressed on a non-word or a non-doubleword boundary.