Quiz
System level
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Fragen in diesem Quiz (140)
1A branch instruction?
- ASets the program counter to one of two possible values
- BIncreases the program counter by a fixed amount
- CSets the program counter to one of many possible values
- DUnconditionally sets the program counter to its operand
2A callee-saved register should be saved before it is written to in a procedure
- ARichtig
- BFalsch
3A CPU register file is a small storage device that
- AConsists of a collection of word size registers
- BHouses a critical variable for the duration of the execution of a program
- CRecords the results of periodic CPU diagnostics
- DIs automatically loaded when CPU instruction refers to a word of normal memory
4A memory leak is caused by a
- AFailure to free allocated memory
- BFunction that allocates a large amount of memory from the heap
- CNone of these
- DBug in the memory allocator that fails to free memory
5A program cannot accidentally use another program's memory space and "crash" a computer that uses
1- virtual memory address
2- program relocation
3- separate instruction and data caches- A1
- B1 and 2
- C2
- D1,2,3
6A program written directly in machine language (binary) would run faster than the same program written in assembly code and then assembled.
- ARichtig
- BFalsch
7Adding local variables is usually used to reduce what source of inefficiency?
- Aunnecessary memory references
- Bcondition checking overhead
- Cdata dependencies
- Dpoor branch prediction
8Asserting a word line and asserting (to "high" voltage) a bit line writes a 1 to a DRAM cell)
- ARichtig
- BFalsch
9Assume a set-associative and a direct-mapped cache both have the same address size, same data capacity, and same number of index bits. (see the img)
- ANone of the above
- BThe direct-mapped cache has fewer block offset bits
- CThe direct-mapped cache has more block offset bits
- DThe direct-mapped cache has fewer tag bits
- EThe direct-mapped cache has more tag bits
10Assume x is the most positive signed integer. What is x + 1?
- Anone of the above
- B+∞
- C-1
- D-x
11Assuming the standard IEEE-style bias, what is the smallest number of bits a float point number could have and represent the number −29/4 exactly?
- A8
- B4
- C12
- D6
12Buses are typically designed to transfer fixed-sized chunks of bytes known as
- Awords
- Bframes
- Crecords
- Dpages
13Capacity misses are typically discussed in connection with?
- Afully-associative caches
- Bdirect-mapped caches
- Cset-associative caches
- Dall of the above
14Check the following (listed in alphabetical order) in order of importance when optimizing code that operates on very large arrays: B = Body of loop optimization (function inlining, efficient math), C = Cache locality, O = big-O of algorithm used.
- ABCO
- BOBC
- CBOC
- DCOB
15Compare the size of int and int*
- Aeach one of the above depends on the computer
- Bint has fewer bits
- Cint* has fewer bits
- Dthey have the same number of bits
16Compared to dynamic RAM (SRAM), dynamic RAM (DRAM) is
- ADRAM is cheaper than SRAM
- BDRAM is faster than SRAM
- CDRAM is more likely to be used for main memory than for on-chip caches
- DSRAM is more likely to be used for main memory than for on-chip cache
- EDRAM uses more transistors per bit than SRAM
- FDRAM uses a capacitor to store a value
- GTypically a computer has more DRAM than SRAM
17Compiling C into x86 assembly comprises translating each C statement into a single assembly instruction.
- ARichtig
- BFalsch
18Conflict misses are typically discussed in connection with?
- Adirect-mapped caches
- Bset-associative caches
- Cfully-associative caches
- Dall of the above
19CPE (cycles per element, also called cycles per execution or cycles per instruction in other sources). If we have code with 20 CPE and run it on a problem where my algorithm executes on 100 elements; I should expect the runtime to be:
- A50-220 cycles
- B0-50 cycles
- C220-1100 cycles
- D1100-2200 cycles
20Define the polarity of light sensor.
- ALong leg is plus, short is minus
- BLong leg is minus, short is plus
- CIt does not have a polarity.
- DNone of the given.
21Dirty bits are associated with (pick the best answer)
- Awrite-back caches
- Bwrite-through caches
- Cset-associative caches
- Ddirect-mapped caches
22Edsger Dijkstra wrote "Go To Statement Considered Harmful" in 1968 in which he argued (translated into current language) that code that uses goto becomes needlessly hard to read and maintain compared to only using if and while. In assembly, we use the goto-like jump instructions extensively; the main reason for this is?
- Agoto is only bad when mixed with higher-level constructs
- BDijkstra was wrong
- Cno one is reading assembly anyway
- Dthere is no other alternative in assembly
23there is no other alternative in assembly
- ARichtig
- BFalsch
24Given 6-bit numbers where 010001 + 001010 = 010110, which of the following describes the number representation used?
- Afloating-point with 3 exponent bits
- Bfloating-point with 2 exponent bits
- Cinteger
- Dfloating-point with 4 exponent bits
25Given 6-bit numbers where 010101 + 000001 = 010110, which of the following describes the number representation used?{
- Afloating-point with 3 exponent bits
- Binteger
- Cfloating-point with 1 exponent bits
- Dfloating-point with 4 exponent bits
26Good software design includes writing procedures for code you might otherwise repeat in-line. Pulling code into procedures involves call/return overhead; how else can it hurt your program's performance and/or your compiler's ability to optimize your code?
- Afewer opportunities for pipeline-level parallelism
- Bworse instruction cache hit rate
- Cmore chance of compiler having to worry about aliasing and side effects
- Dfewer opportunities for loop unrolling
27How can digital device produce analog output?
- ADigital device can not produce analog output
- BWith the help of PSW
- CWith the help of PWM
- DWith the help of analogRead() function
28How do you read values from the Arduino on the computer screen?
- Athe 'View' button
- Bthe 'Upload' button
- Cthe 'Serial Monitor' button
- Dyou cannot read values from the Arduino on the screen
29How does knowing you have a pipelined processor change the code you write?
- Ait suggests optimizations like adding local variables
- Bit suggests optimizations like loop unrolling
- Cit suggests optimizations like loop reordering
- Dit suggests optimizations like multiple accumulators
30How is "-1" (decimal) represented in an 8-bit 2's complement binary format?
- A11111111
- B11111110
- C11110000
- D01111111
31How is 46 (decimal) represented in an 8-bit 2's complement binary format?
- A00101100
- B00101110
- C00011110
- D01000110
32How is -10 (decimal) represented in an 8-bit 2's complement binary format?
- A11110110
- B10001010
- C11110101
- D11111010
33How many analog ports does an Arduino have?
- A4 labeled A1-A4
- B6 labeled A0-A5
- C6 labeled A1-A6
- D5 labeled A0-A4
34How many hex digits are needed to represent the decimal number 67?
- A2 (43 HEX)
- B6
- C4
- D7
35How many ints fit inside x if x is declared as int *x = malloc(8); ? Word size is 4.
- A4
- B2
- C3
- D7
36How many rules do Unix linkers use for dealing with multiply defined symbol?
- A3
- B4
- C2
- D1
37How would you pause a program for 2.5 seconds?
- Adelay(2500)
- Bdelay(250)
- Cdelay(1000)
- Ddelay(25)
38If a computer has 8GB memory, a single 1MB cache, and 4KB of registers, the total amount of data it can store is?
- A8GB + 1MB + 4KB
- Bmore than 8GB + 1MB + 4KB
- Cmore than 8GB + 1MB but less than 8GB + 1MB + 1KB
- Dmore than 8GB but less than 8GB + 1MB
39If a wire carries a logical value of 0, its voltage level will be 0 Volts.
- ARichtig
- BFalsch
40If we fail to find data in a cache because we have never accessed the data before, we call that a
- Acapacity miss
- Bcold miss
- Cconflict miss
- Dforced miss
41If we fail to find data in a cache because we've read too much data since we last accessed that same data, we call that a
- Acold miss
- Bconflict miss
- Ccapacity miss
- Dforced miss
42If we were running a non-pipelined processor (like SEQ) with a real memory system, which of the following optimization strategies would not longer provide a speed benefit?
- Aadding local variables
- Bfunction call inlining
- Cnone of the above would provide a speed benefit
- Dusing multiple accumulators
43If x is the most negative signed integer, what is -x?
- Athe most negative signed number
- Bone
- Cthe most positive signed number
- Dnegative one
44In a DRAM, all cells have to be periodically refreshed, not just the ones that have been read.
- ARichtig
- BFalsch
45In a program with good ____________, if a memory location is referenced once, then the program is likely to access nearby memory locations in the near future.
- ATemporal locality
- BSpatial locality
- CRepetitive locality
- DAssociative locality
46In C, local variables allocated inside functions are allocated
- AOn the stack
- BIn static storage
- CIn virtual memory
- DIn the heap
47In C, using default floating point settings, a special value of "infinity" is computed when
- AA floating-point computation results in an overflow
- BProgram execution is halted
- CAn erroneous value is computed and execution continues
- DAn exception is raised
48In given two C modules which rule will Unix linker use to resolve multiple symbol definition? (img here)
- AGiven multiple weak symbols, chose any of the weak symbols
- BMultiple strong symbols are not allowed.
- CGiven a strong symbol and multiple weak symbols, choose the strong symbol.
- DNone of these
49In given two C modules which rule will Unix linker use to resolve multiple symbol definition? (img here)
- AGiven multiple weak symbols, chose any of the weak symbols
- BNone of these
- CMultiple strong symbols are not allowed.
- DGiven a strong symbol and multiple weak symbols, choose the strong symbol.
50Suppose we attempt to compile and link the following two C modules. Linker will generate an error
- ARichtig
- BFalsch
51In the FDEMW five-stage pipeline we analyzed in class, if we want to stall memory how many pipeline registers should be given the "stall" signal?
- A4
- B0
- C5
- D3
52In the two's complement number representation, a negative number with more leading ones is larger (i.e. less negative) than a negative number with fewer leading ones.
- ARichtig
- BFalsch
53When shifting a two’s complement number to the left, an overflow can only occur if the number is negative, since positive numbers have a zero in the leftmost bit
- ARichtig
- BFalsch
54In x86 assembly, the eax register can be used to hold integers but not addresses.
- ARichtig
- BFalsch
55Initially byte i of memory is i + 0x20 (mod 256), %eax contains the number 3, and %ebx contains the number 5. What is in %ebx after running x86 movl (%eax), %ebx?
- ANone of the above
- B3
- C0x25
- D0x23
56Inline substitution (also called inlining) is usually used to reduce what source of inefficiency?
- Apoor branch prediction
- Bprocedure call overhead
- Cpoor cache locality
- Dunnecessary memory references
57Jump In the the following Y86-64 program. How many times does the addq instruction execute? (img here)
- A3
- B5
- C10
- D4
58Jump tables, such as are used for switch statements, require that the new PC be determined by a memory read. Suppose we added an assembly instruction memjump accepting a single memory address as its parameter, like memjump (%eax). In the five-stage example pipeline (F D E M W), for how many cycles will we need to bubble and/or stall stage F after executing a memjump?
- A4
- B3
- C5
- D6
59Let f32 be the number of distinct numbers that can be represented in 4-byte IEEE-style floating point and u32 be the number of distinct numbers that can be represented as unsigned 4-byte integers. Which of the following is true?
- Af32 < u32−1
- Bf32 > u32 +1
- Cf32 = u32
- Df32 = u32+1
60Let s8 be the number of distinct numbers that can be represented as signed (two'scomplement) 1-byte integers and u8 be the number of distinct numbers that can be represented as unsigned 1-byte integers. Which of the following is true?
- As8 > u8+1
- Bs8 = u8
- Cs8 = u8 - 1
- Ds8 < u8-1
61Logical address is calculated by: segment.base + eff_addr
- ASelector: eff_addr
- BSegment base + lin_addr
- CSelector: offset
- DSegment base + eff_addr
62Loop blocking is usually used to reduce what source of inefficiency
- Adata dependencies
- Bpoor cache locality
- Cpoor branch prediction
- Dprocedure call overhead
63Programs with good ______ ______, tend to access a referenced memory location multiple times in the near future.
- ATemporal locality
- BSpatial locality
- CRepetitive locality
- DAssociative locality
64Putting \#include "foo.h" in your C file is the equivalent of typing the contents of foo.h into your file.
- ARichtig
- BFalsch
65Rank the following in order of significance when writing code that deals with large arrays:
• Algorithmic efficiency (i.e., big-O),
• Computational efficiency (e.g., loop unrolling, inlining, etc),
• L cache Locality.- AACL
- BALC
- CLCA
- DCAL
66Reassociation of operators is usually used to reduce what source of inefficiency?
- Acondition checking overhead
- Bdata dependencies
- Cpoor branch prediction
- Dpoor cache locality
67Register %edx is one of the "callee-save" registers. This means that if procedure baz calls procedure xyxxy
- Axyxxy may communicate with baz through register %edx
- Bbaz must assume xyxxy could have changed %edx
- Cbaz may assume xyxxy did not change %edx
- Dbaz may communicate with xyxxy through register %edx
68Register %esi is one of the "caller-save" registers. This means that if procedure baz calls procedure xyxxy{
- Abaz must assume xyxxy could have changed %esi
- Bxyxxy may communicate with baz through register %esi
- Cbaz may assume xyxxy did not change %esi
- Dbaz may communicate with xyxxy through register %esi
69Return from function issues a bubble in pipeline.
- ARichtig
- BFalsch
70shiftOut(...., ...., ...., ....); Fill in the gaps.
- AshiftOut(clockPin, dataPin, value, bitOrder)
- BshiftOut(dataPin, clockPin, bitOrder, value)
- CshiftOut(dataPin, clockPin, value, bitOrder)
71SRAM is "static" in the sense that if the power is turned off, SRAM will continue to store data (e.g. as in flash memory in MP3 players or USB thumb drives).
- ARichtig
- BFalsch
72Suppose addresses A and B have different tags but the same index (for those caches that have tags and indexes, that is). Assume the cache is empty prior to the accesses listed in the questions. In the access pattern "read A, then read B, then read A, then read B" the second read of A will be a miss for?
- Aa direct-mapped cache
- Ba set-associative cache
- Ca fully-associative cache
- Dall of the above
73Suppose addresses A and B have different tags but the same index (for those caches that have tags and indexes, that is). Assume the cache is empty prior to the accesses listed in the questions. In the access pattern "read A, then read B" the read of B will be a miss for
- Aall of the above
- Ba fully-associative cache
- Ca direct-mapped cache
- Da set-associative cache
74Suppose an array of char (8-bit values) {0x12, 0x34, 0x56, 0x78} is stored at address 0x24 of a little-endian computer. What byte is stored at address 0x26?
- A0x00
- B0x56
- C0x65
- DA known value not listed here
75The .data section of an x86 assembly program is used to specify the parameters for each procedure.
- ARichtig
- BFalsch
76The assembly instruction int x used to make system calls only accepts a 1-byte (256-value) argument x, but Linux uses it to support over 300 system calls. How does it do that?
- ASRAM would keep its data, DRAM would keep its data
- BSRAM would lose its data, DRAM would keep its data
- CSRAM would keep its data, DRAM would lose its data
- DSRAM would lose its data, DRAM would lose its data
77The contents of how many program registers are modified by an assembly push operation?
- A2
- B1
- C3
- D4
78The difference between the SAR (arithmetic shift right) and SHR (logical shift right) operations is that SAR puts a one into the leftmost bit after a shift and SHR puts a zero.
- ARichtig
- BFalsch
79The EBP is a callee-saved register.
- ARichtig
- BFalsch
80The EFLAGS register contains the zero flag and the sign flag?
- ARichtig
- BFalsch
81The hardware is aware of the program stack
- ARichtig
- BFalsch
82The instruction addq %rax, %rbx changes what?
- AThe contents of the rbx register
- BThe contents of memory at an address found in the rax register
- CThe contents of memory at an address found in the rbx register
- DThe contents of the rax register
83The instruction cmp eax,ebx (or cmp %ebx,%eax in AT&T syntax) computes the value of EAX - EBX.
- ARichtig
- BFalsch
84The valid bit is associated with
- Afully-associative caches
- Bwrite-through caches
- Cset-associative caches
- Ddirect-mapped caches
85The working set of a program is formed by
- AThe pages that the program is actively using
- BThe libraries required by the program
- CThe memory of the program that is currently in physical memory
- DAll the files the program needs to execute
86This function maps input voltages between 0 and 5 volts into integer values between 0 and 1023?
- AanalogWrite()
- BanalogRead()
- CdigitalWrite()
- Dnone of the given
87Using multiple accumulators is usually used to reduce what source of inefficiency?
- Acondition checking overhead
- Bunnecessary memory references
- Cdata dependencies
- Dpoor branch prediction
88We can encode the C command a ? b : c, where all three variables are of type int,
- A((!!a) & b) | ((!a) & c)
- BAny of the above
- C((-!!a) & b) | ((-!a) & c)
- D(a & b) | ((!a) & c)
89We say that pipelining generally increases latency. That statement means (select all that are part of the definition of "increases latency")
- Aeach instruction takes more time to complete
- Beach instruction takes less time to complete
- Centire programs take more time to complete
- Dentire programs take less time to complete
90What are the Arduino's two main program structures?
- Aint and setup
- Bloop and main
- Cmain and setup
- Dsetup and loop
91What command would you use to light up an LED on port 5?
- Aint sensorPin \= A0;
- BdigitalWrite(5, HIGH);
- Cint sensorValue \= 0;
- DpinMode(5, OUTPUT);
92What command would you use to tell the Arduino that there is an output on port 9?
- Aint sensorPin = 9;
- Bint sensorValue = 9;
- CdigitalWrite(9, HIGH);
- DpinMode(9, OUTPUT);
93What is the difference between 15 and $15?
- A15 is an address, $15 is a value
- B15 is a value, $15 is an address
- C15 is legal in assembly, $15 is not
- D$15 is legal in assembly, 15 is not
94What is the result of the following assembly code instruction?
- AFetch the data from register %ecx and store in register %eax
- BFetch the data from the register %ecx and store in the memory address indicated by (%eax)
- CFetch the data from the register %eax and store in register %ecx
- DFetch the data from the memory address indicated by (%eax) and store in the register %ecx
95When shifting a two's complement number to the left, an overflow can only occur if the number is negative, since positive numbers have a zero in the leftmost bit.
- ARichtig
- BFalsch
96Which of the five phases determines how many bytes long an instruction is?
- AFetch
- BDecode
- CWriteback
- DExecute
97Which of the five phases determines what the next PC is?
- AMemory
- BFetch
- CDecode
- DExecute
98Which of the five phases determines the destination register for instructions that write to registers?
- ADecode
- BWriteback
- CFetch
- DExecute
99Which of the following computations may be performed by exactly one CPU instruction? (img)
a = 5;
a = b + c * 5;
for (i = 0; i < 10; i += a[i++]);- AI, II, and III
- BII only
- CI and II only
- DI only
100Which of the following is true?
- AA direct-mapped cache is a set-associative cache with set size 1
- BA direct-mapped cache is a fully-associative cache with only one set
- CA direct-mapped cache is a fully-associative cache with set size 1
- DA direct-mapped cache is a set-associative cache with only one set
101Which of the following manages the transfer of data between the cache and main memory
- AOperating system
- BCompiler
- CHardware
- DRegistry
102Which of the following manages the transfer of data between the CPU registers and the cache
- AOperating system
- BCompiler
- CHardware
- DRegistry
103Which of the following registers is the lower order 16 bit register of register %ecx?
- A%cx
- B%cl
- C%ch
- D%cy
104Which of the following statements about alignment within C struct's is true?
- AA constant offset associated with the member is added to the address
- BThe struct consists of an array of pointers to the elements of the struct
- CThe element name is looked up in a symbol table
- DA linear search is made from the base address of the struct
105Which of these is a digital input device?
- Apressure sensor
- Bservo
- Cpotentiometer
- Dbutton
106Which of these is an analog input device?
- Apressure sensor/Potentiometer
- Bservo
- Cbutton
- DLED
107Which of these is an output device?
- Apressure sensor
- Bservo
- Cbutton
- Dpotentiometer
108Which one of the following IA32 registers is typically used for stack management?
- A%esp
- B%eax
- C%ebx
- D%edi
109Which one of the following optimizations does not provide any speed benefit for a non-pipelined processor, such as SEQ?
- AStoring reused computed values in variables instead of recomputing them
- BInvocation inlining
- CUsing more efficient algorithms
- DReassociation
110Which of the following levels of a typical memory hierarchy transfers data in chunks of smallest size?
- AMain memory < ---> disk
- BCache < ---> main memory
- CThey all transfer one byte at a time
- DCPU registers < ---> cache
111In C a pointer variable is used for storing an address
- ARichtig
- BFalsch
112Select the most correct statement from the following as applied over the last two decades
- AProcessors get faster but memory does not
- BProcessors and memory both get faster, but memory gets faster faster that processors do
- CProcessors and memory both get faster, but processors get faster than memory does
- DMemory gets faster but processor does not
113Which one of the following optimization does not provide any speed benefit for a non-pipelined pro… (хз)
- AUsing more efficient algorithms
- BInvocation inlining
- CReassociation
- DStoring reused, computed values in variables instead of recomputing them
114…… (не видно кусок) to see the following 2 lines. What is the most likely purpose of these 2 lines?
- AIncrement the base pointer by the value in register %esp
- BStore the previous frame pointer and create a new frame pointer
- CMove the stack pointer to the top of the previous stack
- DSave the variables from the previous function invocation
115Consider the following code. Assume the compiler is performing no optimization. Which of the following strategies would improve the speed of this code the most in the case where it returns true?
- AUnroll the loop
- BPull the (x % i)==0 into a function isDivisibleBy
- CDeclare int sx = (int)sqrt(x) and change i < sqrt(x) to i < sx
- DMove the check for (x % 2) != 0 to before the loop
116Consider the following code. This code would most likely benefit from which of the following optimization strategies
- AUsing multiple accumulators
- BImproving cache locality
- CLoop unrolling
- DAdding local variables
117The bitwise and operation (& in C) can be used to the bits of a word.
- ARichtig
- BFalsch
118The bitwise xor operation (^ in C) can be flip the bits of a word
- ARichtig
- BFalsch
119What does the following C code print?
- AP = 103, c = 101
- BP = 104, c = 101
- CP = 105, c = 103
- DP = 104, c = 102
120Consider a direct-mapped cache with 256 sets and 16 byte blocks. In this cache the address 0x12345 maps to the same set as which of the following addresses?
- A0x02345
- B0x22244
- C0x12040
- D0x12354
121In C, on a 34-bit x86 machine, the expression (1<<31) results in a negative integer
- ARichtig
- BFalsch
122Consider the following code. Which of the following changes would make the largest positive impact on its cache locality?
- APut the for-i loop inside of the for-j loop instead of the other way around
- BStore the result of (i*101)%n outside the inner loop
- CBlock the accesses by nesting three or four for loops instead of just two
- DChange int** to int*
123Consider the following code. Assume the compiler is performing no optimizations and that isPrime is the exact code presented in another question on this exam. Which of the following strategies would improve the speed of this code the most?
- AInline the isPrime call
- BAdd a second ans accumulator
- CSwap the order of the if statements
- DChange the nested if statements to a single if with a &&
124Consider the following two versions of a C function: (Assume len is larger than 10)
- Asum1
- BNone of them
- CSum2
- DBoth of them
125Which of the following is necessary true regarding the following code fragment?
- AIt exhibits locality of reference but only when a == b
- BIt exhibits locality of reference because the variables are allocated near each other
- CIt exhibit no locality of reference
- DIt exhibits locality of reference no matter where the variables are allocated
126a & b is the bitwise version of a && b; a | b is the bitwise version of a || b; which of the following is the bitwise version of a == b?
- A~(a = b)
- Ba = b
- C~ (a ^ b)
- Da ^ b
127The unary & operator returns (in C language)
- AThe logical “and” of two integer operands
- BThe logical “or” of two integer operands
- CThe value of a data object
- DThe address of a data object
128In C a single statement that performs the equivalent of y = x *100, but without using the multiply operator (*)
- Ay = (x<<6) + (x<<5) + (x<<2)
- By = (x>>6) + (x<<5) + (x<<2)
- Cy = (x<<6) + (x<<3) + (x>>2)
- Dy = (x<<5) + (x<<5) + (x<<7)
129Adding local variable is usually used to reduce what source inefficiency?
- ACondition checking overhead
- BPoor branch prediction
- CUnnecessary memory references
- DData dependencies
130If, in C, an array is declared by “int a[10];”, then accessing a[11] during execution will generate an error message.
- ARichtig
- BFalsch
131In C, if x is an integer variable, the expression “x << 3” computes x * 8 but does not change the value of x.
- ARichtig
- BFalsch
132Which of the following code snippets is fastest ? Assume n is very large(more than ten thousand).
- Afor(i=0;i<n;i+=1) for(j=0;j<n;j+=1) a[i][j] = b[j][i];
- Bfor(j=0;j<n;j+=1) for(i=0;i<n;i+=1) a[i][j] = b[j][i];
- Cfor(k=0; k<n; k+=16) for(l=0; l<n; l+=16)
for(j=0;j<16;j+=1) for(i=0;i<16;i+=1)
a[i+l][j+k] = b[j+k][i+l]; - Dtwo or more of the above are equivalently the fastest
133Which of these can an Arduino NOT be used for ?
- Acontrolling servos
- Ban Arduino can be used to do all of these
- Cbuilding robots
- Ddisplaying analog inputs
134In binary, the number 1/3 is 0.01010101 . . .. In the following, assume that x is an int and y is a short.(short)((0x5555 * (int)y)>>16) and y/3 could differ because of overflow
- ARichtig
- BFalsch
135In binary, the number 1/3 is 0.01010101 . . .. In the following, assume that x is an int and y is a short. (short)((0x5555 * (int)y)>>16) and y/3 could differ even when neither computation overflows
- ARichtig
- BFalsch
136In binary, the number 1/3 is 0.01010101 . . .. In the following, assume that x is an int and y is a short. For each x there exists some integer w (which may be different for different xs) such that abs(x/3 - q) < 10, where q = (((0x55555555>>w)*x)>>(32-w)).
- ARichtig
- BFalsch
137Using a base address [Eb]%edx=0x1000, and index register [ei]%ecx=0x02, compute the effective address for: move &(%edx,%ecx, 4), %eax)
- A0x1032
- B0x1016
- C0x1064
- D0x1010
138Consider the following code fragment
int a; int b;
int main(int argc, char * argv[]){
int x;
int y;
… /* some code*/
}
Which of the following must be true?- AThe value of &y is closer to the value of &x than to the value &a
- BThe value of *y is closer to the value of *x than to the value *a
- CThe value of *a and *b are closer to each other than the values of *x and *y
- DThe value of &a and &b are closer to each other than the values of &x and &y
139Which of the following is a good reason (are good reasons) to equip the CPU with small amounts of fast memory?
I. To make the design of the compiler simpler
II. To make some CPU instructions smaller
III. To make some CPU instructions faster- AIII only
- BI, II, and III
- CII only
- DII and III only
140Suppose page table entries are 8 bytes long and virtual addresses are 32 bytes long. If each page table is to fit on a single page, what is the smallest pages can be if we have a 2-level page table hierarchy?
- A512 B
- B2 KB
- Csmaller than any of the above options
- Dbigger than any of the above options
Informationen
- Beschreibung
- Quiz am System level, erstellt von Damira Zholdasbay am 09/05/2018.
- Autor
- Damira Zholdasbay
- Sprache
- English
- Aufrufe
- 23
- Schlagwörter
- Bewertung
- Noch keine Bewertungen Bewerte dieses Quiz