Fichas
Computer Organization - Chapter 5
Fichas del conjunto (10)
- 1RAMCategory: Read-write memory
Erasure: Electrically, byte-level
Write Mechanism: Electrically
Volatility: Volatile - 2ROMCategory: Read-only memory
Erasure: Not possible
Write Mechanism: Masks
Volatility: Non-volatile - 3PROMCategory: Read-mostly memory
Erasure: Not possible
Write Mechanism: Electrically
Volatility: Non-volatile - 4EPROMCategory: Read-mostly memory
Erasure: UV light, chiplevel
Write Mechanism: Electrically
Volatility: Non-volatile - 5EEPROMCategory: Read-mostly memory
Erasure: Electrically, byte level
Write Mechanism: Electrically
Volatility: Non-volatile - 6Flash MemoryCategory: Read-mostly memory
Erasure: Electrically, block level
Write Mechanism: Electrically
Volatility: Non-volatile - 7SRAMDigital device that uses the same
logic elements used in the processor. Binary values stored using flip-flop logic gate configurations. Will hold data as long as power is supplied to it. - 8DRAMMade with cells that store data as charge on capacitors. Presence or absence of charge in a capacitor is interpreted as a binary 1 or 0. Requires periodic charge refreshing to maintain data storage
- 9DDR SDRAM DDR achieves higher data rates in three ways:First, data transfer is synchronized to both the rising and falling edge of the clock.
Second, DDR uses higher clock rate on the bus to increase the transfer rate.
Third, a buffering scheme is used. - 10SDRAMExchanges data with the processor synchronized to an external clock signal and running at the full speed of the processor/memory bus without
imposing wait states
Información
- Descripción
- Fichas sobre Computer Organization - Chapter 5, creado por M KB el 24/02/2018.
- Creado por
- M KB
- Visitas
- 0
- Valoración