PIC16F877X

PIC16F877X

1. MEMORY ORGANIZATION

   • Program Memory Organization
   • Data Memory Organization
     • File Select Register (FSR)
     • The Special Function Registers
       • STATUS Register
         • ALU
         • RESET
         • bank select bits
       • OPTION_REG Register
       • INTCON Register
       • PIE1 Register
       • PIR1 Register
       • PIE2 Register
       • PIR2 Register
         • CCP2
         • SSP
         • EEPROM
       • PCON Register
   • PCL and PCLATH
     • program counter
       • 13-bits wide
     • COMPUTED GOTO
     • STACK
   • Program Memory Paging
   • NDF and FSR

2. I/O PORTS

   • PORTA and the TRISA Register
   • PORTB and the TRISB Register
   • PORTC and the TRISC Register
   • PORTD and TRISD Registers
   • PORTE and TRISE Register
   • Parallel Slave Port

3. DATA EEPROM AND FLASH PROGRAM MEMORY

   • EECON1 and EECON2
   • Reading the EEPROM Data Memory
   • Writing to the EEPROM Data Memory
   • Writing to the FLASH Program Memory
   • Reading the FLASH Program Memory
   • Write Verify
   • Protection Against Spurious Writes
   • Operation While Code Protected
   • FLASH Program Memory Write Protection

4. TIMER0 MODULE

   • Timer0 Interrupt
   • Using Timer0 with an External Clock
   • Prescaler

5. TIMER1 MODULE

   • Operation in Timer Mode
   • Operation in mode Counter
     • Synchronized
     • Asynchronous
   • Oscillator
   • Prescaler

6. TIMER2 MODULE

   • Prescaler and Postscaler

7. CAPTURE/COMPARE/PWM MODULES

   • Capture Mode
     • CCP PIN CONFIGURATION
     • TIMER1 MODE SELECTION
     • SOFTWARE INTERRUPT
     • CCP PRESCALER
   • Compare Mode
     • CCP PIN CONFIGURATION
     • TIMER1 MODE SELECTION
     • SOFTWARE INTERRUPT MODE
     • SPECIAL EVENT TRIGGER
   • PWM Mode (PWM)
     • PERIOD
     • DUTY CYCLE

8. MASTER SYNCHRONOUS SERIAL PORT (MSSP) MODULE

   • SPI Mode
     • SDO
     • SDI
     • SCK
     • MASTER MODE
     • SLAVE MODE
   • MSSP I 2 C Operation
     • SLAVE MODE
       • Addressing
       • Reception
       • Transmission
     • GENERAL CALL ADDRESS SUPPORT
     • SLEEP OPERATION
     • EFFECTS OF A RESET
     • MASTER MODE
     • MULTI-MASTER MODE
     • I 2 C MASTER
       • Mode Operation
       • mode SUPPORT
       • MODE START CONDITION TIMING
         • WCOL Status Flag
       • TRANSMISSION
         • BF Status Flag
         • WCOL Status Flag
         • ACKSTAT Status Flag
       • MODE RECEPTION
         • BF Status Flag
         • SSPOV Status Flag
         • WCOL Status Flag
     • BAUD RATE GENERATOR
     • ACKNOWLEDGE SEQUENCE TIMING
       • WCOL Status Flag
     • STOP CONDITION TIMING
       • WCOL Status Flag
     • CLOCK ARBITRATION
     • SLEEP OPERATION
     • EFFECTS OF A RESET
   • Connection Considerations for I 2 C Bus

9. ADDRESSABLE UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER TRANSMITTER (USART

   • Baud Rate Generator (BRG)
     • SAMPLING
   • Asynchronous Mode
     • ASYNCHRONOUS TRANSMITTER
     • ASYNCHRONOUS RECEIVER
   • SETTING UP 9-BIT MODE WITH ADDRESS DETECT
   • Synchronous Master Mode