Chapter 5: BUS SYSTEM

Chapter 5: BUS SYSTEM

1. It is a path way of data

2. may consist of 32, 64, 128 or more separate lines

3. number of lines means how many bits can be transferred at a time

4. Address Bus

   • design the source or destination of the data on data bus
   • width determines the maximum memory capacity

5. Control Bus

   • to control the access, used of the data and address lines
   • data and address lines are share with every component, so they need something to control their use
   • control signals transmit command & timing information among system modules
     • timing signals indicate the validity of data and address information
     • command signals specify operations to be performed

6. Operation of the Bus

   • if one module wished to send data to another, need to obtain the use of the bus and transfer data via the bus

7. Internal & External Buses

   • Internal bus is inside CPU only
   • External bus is CPU connect with other component & supported by third-party hardware

8. Bus Hierarchy

   • Processor bus, Cache bus, Memory bus, Local bus, Standard bus

9. Bus Width

   • The wider the bus width, the more information can flow over the channel

10. Bus Speed

    • how many bits of information can be sent across each wire each second

11. Bus Bandwidth

    • Bandwidth = bus width x bus speed

12. PCI

    • Better system performance for high speed I/O subsystem
    • high bandwidth