Chapter 7 Pipelining & RISC

Chapter 7 Pipelining & RISC

1. Pipelining strategy

   • Pipelining
     • Two-stage Instruction Pipeline
     • Additional stages
       • Fetch instruction
       • Decode instruction
       • Calculate operands
       • Fetch operands
       • Execute instruction
       • Write operand
   • Pipelining of unequal stages

2. Pipeline Hazards

   • Type of data hazard
     • Read After Write (RAW)
     • Write After Read (WAR)
     • Write After Write (WAW)
   • Control Hazard

3. Reduced Instruction Set Computers (RISC)

   • Characteristics of RISC
     • One machine instruction per machine cycle
     • Register-to-register
     • Simple Addressing modes
     • Simple instruction formats
   • CISC versus RISC characteristics
     • Quantitative
     • Qualitative
     • Have high differences during comparisons