CPU Architectures - OCR Computer Science A Level

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A level Computer Science (Structure, Function, and Types of the Processor) Flashcards on CPU Architectures - OCR Computer Science A Level, created by Malachy Moran-Tun on 18/05/2022.
Malachy Moran-Tun
Flashcards by Malachy Moran-Tun, updated more than 1 year ago More Less
Malachy Moran-Tun
Created by Malachy Moran-Tun about 2 years ago
Malachy Moran-Tun
Copied by Malachy Moran-Tun almost 2 years ago
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Question Answer
What is the Von Neumann Architecture? > Single shared memory and shared bus for data and instructions > Bus transfers either data or instructions > Bottleneck as the instruction cannot be completed until both data and instructions have been fetched and decoded
What is the Harvard Architecture? > Two separate memory and data buses for data and instructions > Each memory has a dedicated bus which allows it to fetch data and instructions simultaneously > Expensive and complex to implement
What is the Contemporary Architecture? > Uses aspects of both Von Neumann and Harvard > Von Neumann architecture is used for the main memory - contains a bottleneck > Harvard is used for the cache - data and instructions are fetched independently - no bottleneck
What is CISC Architecture? > Complex Instruction Set Computing > Aims to complete the task in as few lines of assembly as possible > Processor hardware and circuitry has to be more complicated > Complex instructions that resembles high-level language > Complier has to do little work to translate the high-level language to assembly > Instructions may take more than one cycle - no pipelining > Used in PCs - x86 processors
What is RISC Architecture? > Uses simple instructions that are executed within a single clock cycle > Instructions separated into smaller commands > More lines of code required - compiler has to do more conversion work & more RAM is required to store instructions > Processing takes up less energy; each instruction can be completed in a single clock cycle, and pipelining can be applied > Requires fewer transistors and less complex hardware, leaving more room for general purpose registers, cache, and therefore lower energy requirements > Used in smartphones, tablets, and embedded system via ARM processors
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