Design Verification

How to verify the correctness of your programs?
As a program's logic becomes more complex, it is increasingly important to verify its correctness
SELECTING VERIFICATION METHODS
1. DEFECT PROFILE
  1. Defect experience
  2. Focus on those areas that cause you the most trouble.
2. VERIFICATION EFFECTIVENESS
  1. You should identify a family of effective verification techniques
    1. Make a practice of using them
3. VERIFICATION ECONOMICS
  1. You must learn which verification method work best for you and the conditions under which they work.
DESIGN STANDARDS
1. PRODUCT CONVENTIONS
  1. Essential if multiple developers are to produce a system that has any external coherence
    1. User Interfaces
    2. External naming
    3. System error handling
    4. Installation procedures
    5. Help facilities
2. PRODUCT DESIGN STANDARDS
  1. Calling and naming conventions
  2. Header standards
  3. Test standards
  4. Documentation formats
3. REUSE STANDARDS
  1. They must be properly managed
    1. Think about reuse during design / design reviews
  2. They can substantially improve your productivity
VERIFICATION METHODS
1. SYMBOLIC EXECUTION
  1. It covers all symbolic values rather than merely a few tested cases
  2. Provides a structured and theoretically sound way to logically verify programs
2. PROOF BY INDUCTION
  1. Applies to logical expressions with integer parameters.
  2. You start by showing that the logic of a program is true for a base case
VERIFYING THE OBJECT STATE MACHINE
1. Check for hidden traps or loops
2. Check for all possible states
3. Check for state orthogonality
4. Check for complete transitions
PROGRAM TRACING
1. EXECUTION TABLES
  1. Provides an orderly way to check the logic flow in a Logic Specification Template
    1. You list the logic steps in order together with the variable and parameters values for each case to be examined.
      1. When loops are encountered, their instructions are repeated until the cycle is completed.
  2. Time consuming
    1. Reliable
      1. Simple
2. TRACE TABLES
  1. More efficient for verifying logic correctness
    1. Involves three complementary techniques:
      1. Symbolic Execution
      2. Trace table examination of all possible cases
      3. Proof by induction
VERIFYING PROGRAM CORRECTNESS
1. TESTING LOOPS
  1. For-loop Verification
  2. While-loop Verification
  3. Repeat-until Verification
COMMENTS ON VERIFICATION METHODS
1. DESIGN VERIFICATION STRATEGY
  1. You should design down and verify up.
2. SPECIFICATION CONFORMANCE
  1. Consider all possible logic cases and verify that they're correctly handled.
3. VERIFICATION COMPLEXITY
  1. Track the time verification takes and the degree to which it helps you to find design defects
4. FORMAL VERIFICATION METHODS
  1. Best used during program design.
  2. Human-intensive, subject to error.
  3. You must practice each method until you're reasonably proficient.

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Design Verification

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	Created by ALEJANDRA HEREDIA MENDEZ about 5 years ago