Advanced Computer Architecture

Deka Auliya
Mind Map by Deka Auliya, updated more than 1 year ago More Less
Deka Auliya
Created by Deka Auliya over 4 years ago
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Description

Undergraduate Computer Science Mind Map on Advanced Computer Architecture, created by Deka Auliya on 04/23/2015.

Resource summary

Advanced Computer Architecture
1 Introduction
1.1 Hardware components
1.1.1 ALU
1.1.2 Control Unit
1.1.3 Registers
1.2 Program execution
1.2.1 Instruction FETCH
1.2.2 Instruction DECODE
1.2.3 Execute
1.2.4 Memory Access
1.2.5 Write Back
1.3 Performance metric
1.3.1 execution time = cpu time = IC x CPI x Tc
1.3.1.1 clock period
1.3.1.1.1 semiconductor technology
1.3.1.1.2 datapath design and implemetation
1.3.1.2 instruction count
1.3.1.2.1 program
1.3.1.2.2 instruction set architecture
1.3.1.3 clocks per instuction
1.3.1.3.1 isa
1.3.1.3.2 datapath design
1.3.1.3.3 parallel and pipelined HW
1.3.2 indicator: execution time
1.3.3 performance = 1/execution time
1.3.4 total no. of cycles = sum(IC k x CPI k), k is a category
1.3.5 average CPI = total cycles/IC = sum (wk x IC k)
1.3.6 datapath
1.3.6.1 multicycle datapath: CPI > 1
1.3.6.2 pipelined datapth: CPI can bereduced up to 1
1.3.6.3 parallel datapath: CPI <1
1.3.6.3.1 VLIW/Superscalar processors
1.3.6.3.2 SIMD and multicore processors
1.3.7 speedup
1.3.7.1 speedup = execution time of A/ execution time of B

Annotations:

  • 1. Speed up of computer B over A 2. Computer B is the enhanced version of computer A 3. The one being evaluated as divisor
1.3.8 throughput rate
1.3.9 response time/latency
1.3.10 MIPS
1.3.10.1 native
1.3.10.2 relative
1.3.10.3 peak
1.3.11 FLOPS
1.4 Enhancement
1.4.1 reduce Tc ⇒ increase clock frequency
1.4.1.1 power consumption ↑
1.4.1.2 CPI may ↑
1.4.1.3 memory wall problem
1.4.2 reduce CPI
1.4.2.1 instruction pipelining
1.4.2.2 multicore processing
1.4.3 reduce IC
1.4.3.1 more complex instructions
1.4.3.2 Tc may ↑
1.4.3.3 multi-issue processor
1.5 power dissipation
1.5.1 dynamic
1.5.2 stati
2 ISA
2.1 Instruction format
2.1.1 R-format
2.1.2 I-format
2.1.3 J-format
2.2 adressing modes
2.3 register file
2.4 types of operations
2.4.1 ALU
2.4.1.1 arithmetic
2.4.1.2 logical
2.4.1.3 shift
2.4.2 Data Transfer
2.4.2.1 load-store
2.4.3 Control-Flow
2.4.3.1 unconditional
2.4.3.2 conditional
2.5 memory address space
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