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3827442
Vhdl source file
Description
CSD project_1 (EX1A)
No tags specified
vhdl
design_1
csd
Mind Map by
Cristina Pérez9355
, updated more than 1 year ago
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Created by
Cristina Pérez9355
over 6 years ago
21
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Resource summary
Vhdl source file
synthesis
circuit synthesized for a target chip PDL, FPGA
VHDL-based simulation TestBench
behavioral high-level simulation
Gate-level simulation
Run simulation
LAB test & measurements
Circuit_1.vhd
writing a text file scriptum editor
equation
schematic entry translation
schematic
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