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Von Neumann Architecture

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Some notes on Von Neumann Architecture
Max Williams
Note by Max Williams, updated more than 1 year ago
Max Williams
Created by Max Williams over 5 years ago
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Von Neumann Architecture

Von Neumann architecture is a way of setting up a computer. Below is an illustrated diagram showing the basic setup

Basic facts: Von neumann architecture is a sequential processing machine meaning it processes the lines of programs, one at a time It is used in most modern computers Program memory is stored in the same place as a data Components: The Von Neumann architecture is made up of: Memory The computer will have memory that can hold both data and also the program processing that data. In modern computers this memory is RAM. Control Unit The control unit controls the moving of data in and out of the memory unit It also processes (executes) the queued commands one at a time This means Von Neumann is a sequential processing machine. Arithmetic Logic unit This only used carry out calculations upon the data. It performs add, multiply, divide and subtract calculations as well as 'Greater Than', 'Less Than', 'Equal To' calculations. Input - Output This architecture allows for the idea that a person needs to interact with the machine. Whatever values that are passed to and forth are stored once again in some internal registers. Bus Von Neumann architecture allows data to easily flow between components It does this through use of busses These a wires that allow data to travel between the components They are known generally as data busses Pros of Von Neumann: Von Neumann architecture is much simpler than the Harvard architecture. Flexibility so you can change system components easily It can hold both data and programs / instructions, so you don’t have to split the memory which may be limited. Multiple buses are not needed to carry data and instructions separately. Cons of Von Neumann: Sometimes bottlenecking can occur, This is where the flow of data is impaired or stopped entirely. Effectively, there isn't enough data handling capacity to handle the current volume of traffic. This latency is caused by data and instructions being moved between the processor and memory, so it can inevitably be slower. The program instructions and data are stored in the same place on expensive RAM In harvard program instructions are stored separately to, which means that if they are fixed and don’t need to be changed, they can be stored on much cheaper ROM, reducing the cost.

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