Mapa mental
Truth table and inputs/outputs
Conteúdo do mapa
Truth table and inputs/outputs
Use decoder4to16 (form by two chip74LS138)
- Transform into a vhdl file with 4 inputs, 16 outputs and 3 Enables
- Adequate to our parameters
- ispLEVER, to compile all together
- ActiveHDL to simulate the results
- Adequate to our circuit_1
- Repeat the process
- Adequate to our circuit_1
- Synplify to discover our new circuit designed
- ActiveHDL to simulate the results
- ispLEVER, to compile all together
- Adequate to our parameters
- Transform into a vhdl file with 4 inputs, 16 outputs and 3 Enables
Informações
- Descrição
- CSD project_1 (EX1A)
- Criado por
- cristinaaa.perez
- Visualizações
- 5
- Tags
- Histórico
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- Criado por Cristina Pérez9355 · 27 out 2015
- Copiado por cristinaaa.perez · 27 out 2015
- Avaliação