Quiz
SDP10 Endterm
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Questions in this quiz (148)
11. A branch instruction is:
- ASets the program counter to one of two possible values
- BIncreases the program counter by a fixed amount
- CSets the program counter to one of many possible values
- DUnconditionally sets the program counter to its operand
2A callee-saved register should be saved before it is written to in a procedure
- ATrue
- BFalse
3A CPU register file is a small storage device that
- AConsists of a collection of word size registers
- BHouses a critical variable for the duration of the execution of a program
- CRecords the results of periodic CPU diagnostics
- DIs automatically loaded when CPU instruction refers to a word of normal memory
44. A memory leak is caused by a
A. Failure to free allocated memory
B. Function that allocates a large amount of memory from the heap
C. None of these
D. Bug in the memory allocator that fails to free memory- AFailure to free allocated memory
- BFunction that allocates a large amount of memory from the heap
- CNone of these
- DBug in the memory allocator that fails to free memory
55. A program cannot accidentally use another program's memory space and "crash" a computer that uses (see the img)
1- virtual memory address
2- program relocation
3- separate instruction and data caches- A1
- B1 and 2
- C2
- D1,2,3
66. A program written directly in machine language (binary) would run faster than the same program written in assembly code and then assembled.
- AA. False
- BB. True
77. Adding local variables is usually used to reduce what source of inefficiency?
- Aunnecessary memory references
- Bcondition checking overhead
- Cdata dependencies
- Dpoor branch prediction
88. Asserting a word line and asserting (to "high" voltage) a bit line writes a 1 to a DRAM cell)
- AA. False
- BB. True
99. Assume a set-associative and a direct-mapped cache both have the same address size, same data capacity, and same number of index bits. (see the img)
A. The direct-mapped cache has more tag bits
B. The direct-mapped cache has fewer tag bits
C. The direct-mapped cache has more block offset bits
D. The direct-mapped cache has fewer block offset bits
E. None of the above- AThe direct-mapped cache has more tag bits
- BThe direct-mapped cache has more block offset bits (The direct-mapped cache has fewer tag bits )
- CThe direct-mapped cache has fewer block offset bits
- DNone of the above
1010. Assume x is the most positive signed integer. What is x + 1?
- Anone of the above
- B+∞
- C-1
- D-x
1111. Assuming the standard IEEE-style bias, what is the smallest number of bits a float point number could have and represent the number −29/4 exactly?
- A8
- B4
- C6
- D12
1212. Buses are typically designed to transfer fixed-sized chunks of bytes known as
- Awords
- Bframes
- Crecords
- Dpages
1313. Capacity misses are typically discussed in connection with?
- Afully-associative caches
- Bdirect-mapped caches
- Cset-associative caches
- Dall of the above
1414. Check the following (listed in alphabetical order) in order of importance when optimizing code that operates on very large arrays: B = Body of loop optimization (function inlining, efficient math), C = Cache locality, O = big-O of algorithm used.
A. BCO
B. OBC
C. BOC
D. COB- ABCO
- BOBC
- CBOC
- DCOB
1515. Compare the size of int and int*
A. each one of the above depends on the computer
B. int has fewer bits
C. int* has fewer bits
D. they have the same number of bits- Aeach one of the above depends on the computer
- Bint has fewer bits
- Cint* has fewer bits
- Dthey have the same number of bits
1616. Compared to dynamic RAM (SRAM), dynamic RAM (DRAM) is
- ADRAM is cheaper than SRAM
- BDRAM is faster than SRAM
- CDRAM is more likely to be used for main memory than for on-chip caches
- DD. SRAM is more likely to be used for main memory than for on-chip caches
1716. Compared to dynamic RAM (SRAM), dynamic RAM (DRAM) is
- AA. DRAM uses more transistors per bit than SRAM
- BB. DRAM uses a capacitor to store a value
- CC. Typically a computer has more DRAM than SRAM
1817. Compiling C into x86 assembly comprises translating each C statement into a single assembly instruction.
- AFalse
- BTrue
1918. Conflict misses are typically discussed in connection with?
- Adirect-mapped caches
- Bset-associative caches
- Cfully-associative caches
- Dall of the above
2019. CPE (cycles per element, also called cycles per execution or cycles per instruction in other sources). If we have code with 20 CPE and run it on a problem where my algorithm executes on 100 elements; I should expect the runtime to be:
A. 50-220 cycles
B. 0-50 cycles
C. 220-1100 cycles
D. 1100-2200 cycles- AA. 50-220 cycles
- BB. 0-50 cyclesv
- CC. 220-1100 cycles
- DD. 1100-2200 cycles
2120. Define the polarity of light sensor.
- AA. Long leg is plus, short is minus
- BB. Long leg is minus, short is plus.
- CC. It does not have a polarity.
- DD. None of the given.
2221. Dirty bits are associated with (pick the best answer)
- AA. write-back caches
- BB. write-through caches
- CC. set-associative caches
- DD. direct-mapped caches
2322. Edsger Dijkstra wrote "Go To Statement Considered Harmful" in 1968 in which he argued (translated into current language) that code that uses goto becomes needlessly hard to read and maintain compared to only using if and while. In assembly, we use the goto-like jump instructions extensively; the main reason for this is?
- AA. goto is only bad when mixed with higher-level constructs
- BB. Dijkstra was wrong
- CC. no one is reading assembly anyway
- DD. there is no other alternative in assembly
2423. Every procedure in an x86 assembly program must be declared using .globl
- AA. False
- BB. True
2525. Given 6-bit numbers where 010001 + 001010 = 010110, which of the following describes the number representation used?
- AA. floating-point with 2 exponent bits
- BB. floating-point with 3 exponent bits
- CC. integer
- DD. floating-point with 4 exponent bits
2626. Given 6-bit numbers where 010101 + 000001 = 010110, which of the following describes the number representation used?{
- AA. integer
- BB. floating-point with 3 exponent bits
- CC. floating-point with 1 exponent bits
- DD. floating-point with 2 exponent bits
2727. Good software design includes writing procedures for code you might otherwise repeat in-line. Pulling code into procedures involves call/return overhead; how else can it hurt your program's performance and/or your compiler's ability to optimize your code?
- AA. more chance of compiler having to worry about aliasing and side effects
- BB. fewer opportunities for pipeline-level parallelism
- CC. worse instruction cache hit rate
- DD. fewer opportunities for loop unrolling
2828. How can digital device produce analog output?
- AA. With the help of PWM
- BB. Digital device can not produce analog output
- CC. With the help of PSW
- DD. With the help of analogRead() function
2929. How do you read values from the Arduino on the computer screen?
- AA. the 'Serial Monitor' button
- BB. the 'View' button
- CC. the 'Upload' button
- DD. you cannot read values from the Arduino on the screen
3030. How does knowing you have a pipelined processor change the code you write?
- AA. it suggests optimizations like multiple accumulators
- BB. it suggests optimizations like adding local variables
- CC. it suggests optimizations like loop unrolling
- DD. it suggests optimizations like loop reordering
3131. How is "-1" (decimal) represented in an 8-bit 2's complement binary format?
- AA. 11111111
- BB. 001010101001
32How is 46 (decimal) represented in an 8-bit 2's complement binary format?
- AA. 00101100
- BB. 00101110
- CC. 00011110
- DD. 01000110
3332. How is -10 (decimal) represented in an 8-bit 2's complement binary format?
- AA. 11110110
- BB. 10001010
- CC. 11110101
- DD. 11111010
3434. How many analog ports does an Arduino have?
- AA. 4 labeled A1-A4
- BB. 6 labeled A0-A5
- CC. 6 labeled A1-A6
- DD. 5 labeled A0-A4
3535. How many hex digits are needed to represent the decimal number 67?
- AA. 2 (43 HEX)
- BB. 6
- C4
- D7
3636. How many ints fit inside x if x is declared as int *x = malloc(8); ? Word size is 4.
- A2
- B1
- C8
- D0
3737. How many rules do Unix linkers use for dealing with multiply defined symbol?
- A3
- B4
- C5
- D2
3838. How would you pause a program for 2.5 seconds?
- AA. delay(2500)
- BB. delay(2.5)
- CC. delay(25)
- DD. delay
3939. If a computer has 8GB memory, a single 1MB cache, and 4KB of registers, the total amount of data it can store is?
- AA. more than 8GB but less than 8GB + 1MB
- BB. more than 8GB + 1MB but less than 8GB + 1MB + 1KB
- CC. more than 8GB + 1MB + 4KB
- DD. 8GB + 1MB + 4KB
4040. If a wire carries a logical value of 0, its voltage level will be 0 Volts.
- AFalse
- BTrue
4141. If we fail to find data in a cache because we have never accessed the data before, we call that a
- AA. cold miss
- BB. capacity miss
- CC. conflict miss
- DD. forced miss
4242. If we fail to find data in a cache because we've read too much data since we last accessed that same data, we call that a
- AA. capacity miss
- BB. cold miss
- CC. conflict miss
- DD. forced miss
4343. If we were running a non-pipelined processor (like SEQ) with a real memory system, which of the following optimization strategies would not longer provide a speed benefit?
- AA. using multiple accumulators
- BB. adding local variables
- CC. function call inlining
- DD. none of the above would provide a speed benefit
4444. If x is the most negative signed integer, what is -x?
- AA. the most negative signed number
- BB. one
- CC. the most positive signed number
- DD. negative one
4545. In a DRAM, all cells have to be periodically refreshed, not just the ones that have been read.
- ATrue
- BFalse
4646. In a program with good ____________, if a memory location is referenced once, then the program is likely to access nearby memory locations in the near future.
- AA. Spatial locality
- BB. Temporal locality
- CC. Repetitive locality
- DD. Associative locality
4747. In C, local variables allocated inside functions are allocated
- AA. On the stack
- BB. In static storage
- CC. In virtual memory
- DD. In the heap
4848. In C, using default floating point settings, a special value of "infinity" is computed when
- AA. A floating-point computation results in an overflow
- BB. Program execution is halted
- CC. An erroneous value is computed and execution continues
- DD. An exception is raised
49
49. In given two C modules which rule will Unix linker use to resolve multiple symbol definition? (img here)- AA. Given a strong symbol and multiple weak symbols, choose the strong symbol.
- BB. Given multiple weak symbols, chose any of the weak symbols
- CMultiple strong symbols are not allowed.
- DD. None of these
5050. In given two C modules which rule will Unix linker use to resolve multiple symbol definition? (img here)

- AA. Multiple strong symbols are not allowed.
- BB. None of these
- CC. Given multiple weak symbols, chose any of the weak symbols
- DD. Given a strong symbol and multiple weak symbols, choose the strong symbol.
5151. Suppose we attempt to compile and link the following two C modules. Linker will generate an error

- Aa. True
- Bb. False
5252. In the FDEMW five-stage pipeline we analyzed in class, if we want to stall memory how many pipeline registers should be given the "stall" signal?
- A4
- B0
- C5
- D3
5353. In the two's complement number representation, a negative number with more leading ones is larger (i.e. less negative) than a negative number with fewer leading ones.
- Atrue
- Bfalse
5454. When shifting a two’s complement number to the left, an overflow can only occur if the number is negative, since positive numbers have a zero in the leftmost bit
- Afalse
- Btrue
5555. In x86 assembly, the eax register can be used to hold integers but not addresses.
- Afalse
- Btrue
5656. Initially byte i of memory is i + 0x20 (mod 256), %eax contains the number 3, and %ebx contains the number 5. What is in %ebx after running x86 movl (%eax), %ebx?
- AA. None of the above
- BB. 3
- CC. 0x25
- DC. 0x23
5757. Inline substitution (also called inlining) is usually used to reduce what source of inefficiency?
- AA. procedure call overhead
- BB. poor branch prediction
- CC. poor cache locality
- DD. unnecessary memory references
58
58. Jump In the the following Y86-64 program. How many times does the addq instruction execute? (img here)- A4
- B3
- C5
- D10
5959. Jump tables, such as are used for switch statements, require that the new PC be determined by a memory read. Suppose we added an assembly instruction memjump accepting a single memory address as its parameter, like memjump (%eax). In the five-stage example pipeline (F D E M W), for how many cycles will we need to bubble and/or stall stage F after executing a memjump?
- A3
- B4
- C5
- D6
6060. Let f32 be the number of distinct numbers that can be represented in 4-byte IEEE-style floating point and u32 be the number of distinct numbers that can be represented as unsigned 4-byte integers. Which of the following is true?
- AA. f32 < u32−1
- BB. f32 > u32 +1
- CC. f32 = u32
- DD. f32 = u32+1
6161. Let s8 be the number of distinct numbers that can be represented as signed (two'scomplement) 1-byte integers and u8 be the number of distinct numbers that can be represented as unsigned 1-byte integers. Which of the following is true?
- AA. s8 = u8
- BB. s8 > u8+1
- CC. s8 = u8 - 1
- DD. s8 < u8-1
6262. Logical address is calculated by: segment.base + eff_addr
- AA. Selector: eff_addr
- BB. Segment base + lin_addr
- CC. Selector: offset
- DD. Segment base + eff_addr
6363. Loop blocking is usually used to reduce what source of inefficiency?
- AA. poor cache locality
- BB. data dependencies
- CC. poor branch prediction
- DD. procedure call overhead
6464. Loop unrolling is usually used to remove what source of inefficiency?
- AA. poor cache locality D. procedure call overhead
- BB. data dependencies
- CC. poor branch prediction
6565. Programs with good ______ ______, tend to access a referenced memory location multiple times in the near future.
- AA. Temporal locality
- BB. Spatial locality
- CC. Repetitive locality
- DD. Associative locality
6666. Putting \#include "foo.h" in your C file is the equivalent of typing the contents of foo.h into your file.
- Atrue
- Bfalse
6767. Rank the following in order of significance when writing code that deals with large arrays:
• Algorithmic efficiency (i.e., big-O),
• Computational efficiency (e.g., loop unrolling, inlining, etc),
• L cache Locality.- AA. ACL
- BB. ALC
- CC. LCA
- DD. CAL
6868. Reassociation of operators is usually used to reduce what source of inefficiency?
- AA. data dependencies
- BB. condition checking overhead
- CC. poor branch prediction
- DD. poor cache locality
6969. Register %edx is one of the "callee-save" registers. This means that if procedure baz calls procedure xyxxy
- AA. baz may assume xyxxy did not change %edx
- BB. xyxxy may communicate with baz through register %edx
- CC. baz must assume xyxxy could have changed %edx
- DD. baz may communicate with xyxxy through register %edx
7070. Register %esi is one of the "caller-save" registers. This means that if procedure baz calls procedure xyxxy{
- AA. baz must assume xyxxy could have changed %esi
- BB. xyxxy may communicate with baz through register %
- CC. baz may assume xyxxy did not change %esi
- DD. baz may communicate with xyxxy through register %esi
7171. Return from function issues a bubble in pipeline.
- AA. True
- Bfalse
7272. shiftOut(...., ...., ...., ....); Fill in the gaps.
- AA. shiftOut(dataPin, clockPin, bitOrder, value)
- BB. shiftOut(clockPin, dataPin, value, bitOrder)
- CC. shiftOut(dataPin, clockPin, value, bitOrder)
7373. SRAM is "static" in the sense that if the power is turned off, SRAM will continue to store data (e.g. as in flash memory in MP3 players or USB thumb drives).
- Afalse
- Btrue
74
74. Suppose addresses A and B have different tags but the same index (for those caches that have tags and indexes, that is). Assume the cache is empty prior to the accesses listed in the questions. In the access pattern "read A, then read B, then read A, then read B" the second read of A will be a miss for?- AA. a direct-mapped cache
- BB. a set-associative cache
- CC. a fully-associative cache
- DD. all of the above
7575. Suppose addresses A and B have different tags but the same index (for those caches that have tags and indexes, that is). Assume the cache is empty prior to the accesses listed in the questions. In the access pattern "read A, then read B" the read of B will be a miss for
- AA. all of the above
- Bfully-associative cache
- CC. a direct-mapped cache
- DD. a set-associative cache
7676. Suppose an array of char (8-bit values) {0x12, 0x34, 0x56, 0x78} is stored at address 0x24 of a little-endian computer. What byte is stored at address 0x26?
- AA. 0x56
- BB. 0x00
- CC. 0x65
- DD. A known value not listed here
7777. The .data section of an x86 assembly program is used to specify the parameters for each procedure.
- AA. False
- BB. True
7879. The assembly instruction int x used to make system calls only accepts a 1-byte (256-value) argument x, but Linux uses it to support over 300 system calls. How does it do that?
- AA. SRAM would lose its data, DRAM would keep its data
- BB. SRAM would keep its data, DRAM would keep its data
- CC. SRAM would keep its data, DRAM would lose its data
- DD. SRAM would lose its data, DRAM would lose its data
7980. The contents of how many program registers are modified by an assembly push operation?
- A1
- B2
- C3 or more
- DD. it depends on that argument of the push
80
81. The difference between the SAR (arithmetic shift right) and SHR (logical shift right) operations is that SAR puts a one into the leftmost bit after a shift and SHR puts a zero.- Afalse
- Btrue
8182. The EBP is a callee-saved register.
- Atrue
- Bfalse
8283. The EFLAGS register contains the zero flag and the sign flag?
- AA. True
- BB. False
8384. The hardware is aware of the program stack
- Atrue
- BB. False
8483. The EFLAGS register contains the zero flag and the sign flag?
- AA. True
- BB. False
8585. The instruction addq %rax, %rbx changes what?
- AA. The contents of the rbx register
- BB. The contents of memory at an address found in the rax register
- CC. The contents of memory at an address found in the rbx register
- DD. The contents of the rax register
8687. The valid bit is associated with
- AA. fully-associative caches
- BB. write-through caches
- CC. set-associative caches
- DD. direct-mapped caches
8788. The working set of a program is formed by
- AA. The pages that the program is actively using
- BB. The libraries required by the program
- CC. The memory of the program that is currently in physical memory
- DD. All the files the program needs to execute
8889. This function maps input voltages between 0 and 5 volts into integer values between 0 and 1023?
- AA. analogRead()
- BB. analogWrite()
- CC. digitalWrite()
- DD. none of the given
8990. This problem occurs when a larger type is converted into a smaller type or with the signed-unsigned operations?
- A=Truncation
- Bshit
9091. Using multiple accumulators is usually used to reduce what source of inefficiency?
- AA. unnecessary memory references
- BB. condition checking overhead
- CC. data dependencies
- DD. poor branch prediction
9192. We can encode the C command a ? b : c, where all three variables are of type int,
- AA. ((-!!a) & b) | ((-!a) & c)
- BB. ((!!a) & b) | ((!a) & c)
- CC. Any of the above
- DD. (a & b) | ((!a) & c)
9293. We say that pipelining generally increases latency. That statement means (select all that are part of the definition of "increases latency")
- AA. each instruction takes more time to complete
- BB. each instruction takes less time to complete
- CC. entire programs take more time to complete
- DD. entire programs take less time to complete
9394. What are the Arduino's two main program structures?
- AA. setup and loop
- BB. main and setup
- CC. loop and main
- DD. int and setup
9495. What command would you use to light up an LED on port 5?
- AA. digitalWrite(5, HIGH);
- BB. int sensorPin \= A0;
- CC. int sensorValue \= 0;
- DD. pinMode(5, OUTPUT);
95
96. What command would you use to tell the Arduino that there is an output on port 9?- AA. int sensorPin = 9;
- BB. int sensorValue = 9;
- CC. digitalWrite(9, HIGH);
- DD. pinMode(9, OUTPUT);
9698. What is the difference between 15 and $15?
- AA. 15 is an address, $15 is a value
- BB. 15 is a value, $15 is an address
- CC. 15 is legal in assembly, $15 is not
- DD. $15 is legal in assembly, 15 is not
9799. What is the result of the following assembly code instruction?
movl(%eax), %ecx- AA. Fetch the data from register %ecx and store in register %eax
- BB. Fetch the data from the register %ecx and store in the memory address indicated by (%eax)
- CC. Fetch the data from the register %eax and store in register %ecx
- DD. Fetch the data from the memory address indicated by (%eax) and store in the register %ecx
98101. What value ends up in EAX afer the following code is executed? (img)
- A48 (decimal) or 110000 (binary) or 0x30 (hex)
- Bshit
99102. When shifting a two's complement number to the left, an overflow can only occur if the number is negative, since positive numbers have a zero in the leftmost bit.
- AA. False
- BB. True
100103. Which of the five phases determines how many bytes long an instruction is?
- AA. Fetch
- BB. Decode
- CC. Writeback
- DD. Execute
101104. Which of the five phases determines what the next PC is?
- AA. Fetch
- BB. Memory
- CC. Decode
- DD. Execute
102105. Which of the five phases determines the destination register for instructions that write to registers?
- AA. Decode
- BB. Writeback
- CC. Fetch
- DD. Execute
103106. Which of the following computations may be performed by exactly one CPU instruction? (img)
a = 5;
a = b + c * 5;
for (i = 0; i < 10; i += a[i++]);- AA. I, II, and III
- BB. II only
- CC. I and II only
- DD. I only
104107. Which of the following is true?
- AA. A direct-mapped cache is a set-associative cache with set size 1
- BB. A direct-mapped cache is a fully-associative cache with only one set
- CC. A direct-mapped cache is a fully-associative cache with set size 1
- DD. A direct-mapped cache is a set-associative cache with only one set
105108. Which of the following manages the transfer of data between the cache and main memory
- AA. Operating system
- BB. Compiler
- CC. Hardware
- DD. Registry
106109. Which of the following manages the transfer of data between the CPU registers and the cache
- AA. Operating system
- BB. Compiler
- CC. Hardware
- DD. Registry
107110. Which of the following registers is the lower order 16 bit register of register %ecx?
- AA. %cx
- BB. %cl
- CC. %ch
- DD. %cy
108110. Which of the following registers is the lower order 16 bit register of register %ecx?
- AA. %cx
- BB. %cl
- CC. %ch
- DD. %cy
109111. Which of the following statements about alignment within C struct's is true?
- AA. A constant offset associated with the member is added to the address
- BB. The struct consists of an array of pointers to the elements of the struct
- CC. The element name is looked up in a symbol table
- DD. A linear search is made from the base address of the struct
110114. Which of these is a digital input device?
- AA. pressure sensor
- BB. servo
- CC. potentiometer
- DD. button
111115. Which of these is an analog input device?
- AA. pressure sensor
B. Potentiometer - BC. servo
- CD. button
- DE. LED
- AA. pressure sensor
112116. Which of these is an output device?
- AA. pressure sensor
- BB. servo
- CC. button
- DD. potentiometer
113117. Which one of the following IA32 registers is typically used for stack management?
- AA. %esp
- BB. %eax
- CC. %ebx
- DD. %edi
114118. Which one of the following optimizations does not provide any speed benefit for a non-pipelined processor, such as SEQ?
- AA. Storing reused computed values in variables instead of recomputing them
- BB. Invocation inlining
- CC. Using more efficient algorithms
- DD. Reassociation
115119. Which pin has a built-in LED?
- AA. (13)
- B12
116120. Which of the following levels of a typical memory hierarchy transfers data in chunks of smallest size?
- AA. Main memory < ---> disk
- BB. Cache < ---> main memory
- CC. They all transfer one byte at a time
- DD. CPU registers < ---> cache
117121. In C a pointer variable is used for storing an address
- AA. True
- BB. False
118122. If we cut power for one millisecond, which of the following is true?
- Aa. SRAM would keep its data, DRAM would lose its data
- Bb. SRAM would lose its data, DRAM would keep its data
- Cc. SRAM would lose its data, DRAM would lose its data
- Dd. SRAM would keep its data, DRAM would keep its data
119123. If we cut power for one minute, which of the following is true?
- AA. SRAM would lose its data, DRAM would lose its data
- BB. SRAM would lose its data, DRAM would keep its data
- CC. SRAM would keep its data, DRAM would keep its data
- DD. SRAM would keep its data, DRAM would lose its data
120124. Select the most correct statement from the following as applied over the last two decades
- AA. Processors get faster but memory does not
- BB. Processors and memory both get faster, but memory gets faster faster that processors do
- CC. Processors and memory both get faster, but processors get faster than memory does
- DD. Memory gets faster but processor does not
121125. Which one of the following optimization does not provide any speed benefit for a non-pipelined pro… (хз)
- AA. Using more efficient algorithms
- BB. Invocation inlining
- CC. Reassociation
- DD. Storing reused, computed values in variables instead of recomputing them
122What is the most likely purpose of these 2 lines?

- AA. Increment the base pointer by the value in register %esp
- BB. Store the previous frame pointer and create a new frame pointer
- CC. Move the stack pointer to the top of the previous stack
- DD. Save the variables from the previous function invocation
123127. Consider the following code. Assume the compiler is performing no optimization. Which of the following strategies would improve the speed of this code the most in the case where it returns true?
- Aa) Unroll the loop
- Bb) Pull the (x % i)==0 into a function isDivisibleBy
- Cc) Declare int sx = (int)sqrt(x) and change i < sqrt(x) to i < sx
- Dd) Move the check for (x % 2) != 0 to before the loop
124128. Consider the following code. This code would most likely benefit from which of the following optimization strategies
- AA. Using multiple accumulators
- BB. Improving cache locality
- CC. Loop unrolling
- DD. Adding local variables
125129. The bitwise and operation (& in C) can be used to the bits of a word.
- Afalse
- Btrue
126130. The bitwise xor operation (^ in C) can be flip the bits of a word
- Atrue
- Bfalse
127131. What does the following C code print?
- AA. P = 103, c = 101
- BB. P = 104, c = 101
- CC. P = 105, c = 103
- DD. P = 104, c = 102
128132. Consider a direct-mapped cache with 256 sets and 16 byte blocks. In this cache the address 0x12345 maps to the same set as which of the following addresses?
- AA. 0x02345
- BB. 0x22244
- CC. 0x12040
- DD. 0x12354
129133. In C, on a 34-bit x86 machine, the expression (1<<31) results in a negative integer
- AA. True
- BB. False
130135. Consider the following code. Assume the compiler is performing no optimizations and that isPrime is the exact code presented in another question on this exam. Which of the following strategies would improve the speed of this code the most?
- Aa. Inline the isPrime call
- Bb. Add a second ans accumulator
- Cc. Swap the order of the if statements
- Dd. Change the nested if statements to a single if with a &&
131136. Consider the following two versions of a C function: (Assume len is larger than 10)
- Aa. sum1
- Bb. None of them
- Cc. Sum2
- Dd. Both of them
132137. Which of the following is necessary true regarding the following code fragment?
- Aa. It exhibits locality of reference but only when a == b
- Bb. It exhibits locality of reference because the variables are allocated near each other
- Cc. It exhibit no locality of reference
- Dd. It exhibits locality of reference no matter where the variables are allocated
133138. a & b is the bitwise version of a && b; a | b is the bitwise version of a || b; which of the following is the bitwise version of a == b?
- Aa. ~(a = b)
- Bb. a = b
- Cc. ~ (a ^ b)
- Dd. a ^ b
134139. The unary & operator returns (in C language)
- Aa. The logical “and” of two integer operands
- Bb. The logical “or” of two integer operands
- Cc. The value of a data object
- Dd. The address of a data object
135140. In C a single statement that performs the equivalent of y = x *100, but without using the multiply operator (*)
- Aa. y = (x<<6) + (x<<5) + (x<<2)
- Bb. y = (x>>6) + (x<<5) + (x<<2)
- Cc. y = (x<<6) + (x<<3) + (x>>2)
- Dd. y = (x<<5) + (x<<5) + (x<<7)
136141. Adding local variable is usually used to reduce what source inefficiency?
- Aa) Condition checking overhead
- Bb) Poor branch prediction
- Cc) Unnecessary memory references
- Dd) Data dependencies
137142. If, in C, an array is declared by “int a[10];”, then accessing a[11] during execution will generate an error message.
- AA. true
- Bfalse
138143. In C, if x is an integer variable, the expression “x << 3” computes x * 8 but does not change the value of x.
- AA. true
- Bfalse
139144. Which of the following code snippets is fastest ? Assume n is very large(more than ten thousand).
- AA. for(i=0;i<n;i+=1) for(j=0;j<n;j+=1) a[i][j] = b[j][i];
- BB. for(j=0;j<n;j+=1) for(i=0;i<n;i+=1) a[i][j] = b[j][i];
- CC. for(k=0; k<n; k+=16) for(l=0; l<n; l+=16)
for(j=0;j<16;j+=1) for(i=0;i<16;i+=1)
a[i+l][j+k] = b[j+k][i+l]; - DD. two or more of the above are equivalently the fastest
140145. Which of the following code snippets is fastest ? Assume n is very large(more than ten thousand).
- Aa) for(k=0; k<n; k+=16) for(l=0; l<n; l+=16)
for(j=0;j<16;j+=1) for(i=0;i<16;i+=1)
a[i+l][j+k] = b[i+l][j+k]; - Bb) for(i=0;i<n;i+=1) for(j=0;j<n;j+=1) a[i][j] = b[i][j];
- Cc) for(j=0;j<n;j+=1) for(i=0;i<n;i+=1) a[i][j] = b[i][j];
- Dd) two or more of the above are equivalently the fastest
- Aa) for(k=0; k<n; k+=16) for(l=0; l<n; l+=16)
141
146. Which of these can an Arduino NOT be used for ?- Acontrolling servos
- Ban Arduino can be used to do all of these
- C) building robots
- Ddisplaying analog inputs
142147. In binary, the number 1/3 is 0.01010101 . . .. In the following, assume that x is an int and y is a short.(short)((0x5555 * (int)y)>>16) and y/3 could differ because of overflow
- Aa)false
- Bb)true
143
148. In binary, the number 1/3 is 0.01010101 . . .. In the following, assume that x is an int and y is a short. (short)((0x5555 * (int)y)>>16) and y/3 could differ even when neither computation overflows- Aa)false
- Bb)true
144149. In binary, the number 1/3 is 0.01010101 . . .. In the following, assume that x is an int and y is a short. For each x there exists some integer w (which may be different for different xs) such that abs(x/3 - q) < 10, where q = (((0x55555555>>w)*x)>>(32-w)).
- Aa)false
- Bb)true
145150. Using a base address [Eb]%edx=0x1000, and index register [ei]%ecx=0x02, compute the effective address for: move &(%edx,%ecx, 4), %eax)
- Aa)0x1032
- Bb) 0x1016
- Cc) 0x1064
- Dd) 0x1010
146151. Consider the following code fragment
int a; int b;
int main(int argc, char * argv[]){
int x;
int y;
… /* some code*/
}
Which of the following must be true?- AA. The value of &y is closer to the value of &x than to the value &a
- BB. The value of *y is closer to the value of *x than to the value *a
- CC. The value of *a and *b are closer to each other than the values of *x and *y
- DD. The value of &a and &b are closer to each other than the values of &x and &y
147152. Which of the following is a good reason (are good reasons) to equip the CPU with small amounts of fast memory?
I. To make the design of the compiler simpler
II. To make some CPU instructions smaller
III. To make some CPU instructions faster- AA. III only
- BB. I, II, and III
- CC. II only
- DD. II and III only
148153. Suppose page table entries are 8 bytes long and virtual addresses are 32 bytes long. If each page table is to fit on a single page, what is the smallest pages can be if we have a 2-level page table hierarchy?
- AA. 512 B
- BB. 2 KB
- CC. smaller than any of the above options
- DD. bigger than any of the above options
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