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CSA (Your Christmas Gift)

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God Philosophy Quiz on CSA (Your Christmas Gift), created by хомяк убийца on 23/03/2019.
хомяк убийца
Quiz by хомяк убийца, updated more than 1 year ago
хомяк убийца
Created by хомяк убийца about 5 years ago
302
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Resource summary

Question 1

Question
Operations performed by a processor, such as fetching an instruction, decoding the instruction, performing an arithmetic operation, and so on, are governed by:
Answer
  • a system clock
  • a system processor
  • a clock processor
  • a processor
  • a clock

Question 2

Question
Typically all operations performed by a processor begin with the:
Answer
  • pulse of the clock
  • pulse of the processor
  • it begins by itself
  • both of clock and processor pulse
  • none of the above

Question 3

Question
The time between pulses called?
Answer
  • clock speed
  • clock rate
  • cycle time
  • clock cycle
  • cycle rate

Question 4

Question
Typically, clock signals are generated by a ______, which generates a constant signal wave while power is applied.
Answer
  • quartz crystal
  • calcium crystal
  • zinc crystal
  • mercury crystal
  • radium crystal

Question 5

Question
A processor is driven by a clock with a constant frequency f or, equivalently, a constant cycle time t, where t = 1/f:
Answer
  • Instruction execution rate
  • Instruction execution cycle
  • Instruction execution time
  • Instruction execution period
  • None of the above

Question 6

Question
Average cycles per instruction of a program called:
Answer
  • CPU
  • Clock cycle time
  • CPI
  • Clock rate
  • CPE

Question 7

Question
__ is a collection of programs, defined in a high-level language, that together attempt to provide a representative test of a computer in a particular application or system programming area.
Answer
  • A benchmark suite
  • A performance suite
  • A IDE suite
  • A MIPS suite
  • None of the above

Question 8

Question
Measures such as MIPS and MFLOPS have proven adequate to evaluating the performance of processors
Answer
  • True
  • False

Question 9

Question
SPEC Benchmarks, which evaluates the performance of World Wide Web (WWW) servers:
Answer
  • SPECjvm98
  • SPECjbb2000
  • SPECweb99
  • SPECmail2001
  • all of the above

Question 10

Question
SPEC Benchmarks, which intended to evaluate performance of the combined hardware and software aspects of the Java Virtual Machine (JVM) client platform:
Answer
  • SPECjvm98
  • SPECjbb2000
  • SPECweb99
  • SPECmail2001
  • all of the above

Question 11

Question
SPEC Benchmarks, which for evaluating server-side Java-based electronic commerce applications:
Answer
  • SPECjvm98
  • SPECjbb2000
  • SPECweb99
  • SPECmail2001
  • all of the above

Question 12

Question
SPEC Benchmarks, which designed to measure a system’s performance acting as a mail server
Answer
  • SPECjvm98
  • SPECjbb2000
  • SPECweb99
  • SPECmail2001
  • all of the above

Question 13

Question
ENIAC stands for:
Answer
  • Electronic Numerical Integrator and Computer
  • Electronic Nuclear Integrator and Computer
  • Encapsulation Numerical Integrator and Commerce
  • Encapsulation Numerical Integrator and Computer
  • Electronic Numerical Integer and Computer

Question 14

Question
The general structure of the IAS computer:
Answer
  • main memory
  • arithmetic and logic unit
  • control unit
  • Input/output equipment
  • all of the above

Question 15

Question
Contains a word to be stored in memory or sent to the I/O unit, or is used to receive a word from memory or from the I/O unit
Answer
  • Memory buffer register (MBR)
  • Memory address register (MAR)
  • Instruction register (IR)
  • Instruction buffer register (IBR)
  • Program counter (PC)

Question 16

Question
Specifies the address in memory of the word to be written from or read into the MBR
Answer
  • Memory buffer register (MBR)
  • Memory address register (MAR)
  • Instruction register (IR)
  • Instruction buffer register (IBR)
  • Program counter (PC)

Question 17

Question
Contains the 8-bit opcode instruction being executed.
Answer
  • Memory buffer register (MBR)
  • Memory address register (MAR)
  • Instruction register (IR)
  • Instruction buffer register (IBR)
  • Program counter (PC)

Question 18

Question
Employed to hold temporarily the right-hand instruction from a word in memory
Answer
  • Memory buffer register (MBR)
  • Memory address register (MAR)
  • Instruction register (IR)
  • Instruction buffer register (IBR)
  • Program counter (PC)

Question 19

Question
Contains the address of the next instruction pair to be fetched from memory.
Answer
  • Memory buffer register (MBR)
  • Memory address register (MAR)
  • Instruction register (IR)
  • Instruction buffer register (IBR)
  • Program counter (PC)

Question 20

Question
Transistor is a solid-state device, made from silicon
Answer
  • True
  • False

Question 21

Question
The use of the _______ defines the second generation of computers.
Answer
  • Vacuum tube
  • Transistor
  • Small- and medium-scale integration
  • Large-scale integration
  • Very-large-scale integration

Question 22

Question
The use of the _______ defines the first generation of computers.
Answer
  • Vacuum tube
  • Transistor
  • Small- and medium-scale integration
  • Large-scale integration
  • Very-large-scale integration

Question 23

Question
The use of the ________ defines the third generation of computers.
Answer
  • Vacuum tube
  • Transistor
  • Small- and medium-scale integration
  • Large-scale integration
  • Very-large-scale integration

Question 24

Question
The use of the _________ defines the fourth generation of computers.
Answer
  • Vacuum tube
  • Transistor
  • Small- and medium-scale integration
  • Large-scale integration
  • Very-large-scale integration

Question 25

Question
The use of the _________ defines the fifth generation of computers.
Answer
  • Vacuum tube
  • Transistor
  • Small- and medium-scale integration
  • Large-scale integration
  • Very-large-scale integration

Question 26

Question
Moore’s law: “The cost of a chip has remained virtually unchanged during this period of rapid growth in density. This means that the cost of computer logic and memory circuitry has increasing at a dramatic
Answer
  • True
  • False

Question 27

Question
Moore’s law: “Because logic and memory elements are placed closer together on more densely packed chips, the electrical path length is shortened, decreasing operating speed”
Answer
  • True
  • False

Question 28

Question
Moore’s law: “The computer becomes smaller, making it more convenient to place in a variety of environments”
Answer
  • True
  • False

Question 29

Question
Moore’s law: “There is a reduction in power and cooling requirements”
Answer
  • True
  • False

Question 30

Question
Moore’s law: “The interconnections on the integrated circuit are much more reliable than solder connections. With less circuitry on each chip, there are fewer interchip connections”
Answer
  • True
  • False

Question 31

Question
When Intel was developed its 4004, it is the first chip to contain all of the components of a CPU on a single chip, later known as Microprocessor
Answer
  • 1973
  • 1971
  • 1972
  • 1974
  • 1970

Question 32

Question
Processor can simultaneously work on multiple instructions. How this technique called?
Answer
  • Branch prediction
  • Pipelining
  • Data flow analysis
  • Speculative execution
  • None of the above

Question 33

Question
The processor looks ahead in the instruction code fetched from memory and predicts which branches, or groups of instructions, are likely to be processed next
Answer
  • Branch prediction
  • Pipelining
  • Data flow analysis
  • Speculative execution
  • None of the above

Question 34

Question
The processor analyzes which instructions are dependent on each other’s results, or data, to create an optimized schedule of instructions
Answer
  • Branch prediction
  • Pipelining
  • Data flow analysis
  • Speculative execution
  • None of the above

Question 35

Question
This enables the processor to keep its execution engines as busy as possible by executing instructions that are likely to be needed
Answer
  • Branch prediction
  • Pipelining
  • Data flow analysis
  • None of the above
  • Speculative execution

Question 36

Question
The “natural” unit of organization of memory
Answer
  • Word
  • Addressable units
  • Unit of transfer
  • Sequential access
  • Direct access

Question 37

Question
For main memory, this is the number of bits read out of or written into memory at a time
Answer
  • Word
  • Addressable units
  • Unit of transfer
  • Sequential access
  • Direct access

Question 38

Question
Memory is organized into units of data, called records; access must be made in a specific linear sequence
Answer
  • Word
  • Addressable units
  • Unit of transfer
  • Sequential access
  • Direct access

Question 39

Question
For random-access memory, this is the time it takes to perform a read or write operation
Answer
  • Access time
  • Memory cycle time
  • Transfer rate
  • Performance
  • All of the above

Question 40

Question
The L2 cache is slower and typically larger than the L1 cache, and the L3 cache is slower and typically larger than the L2 cache
Answer
  • True
  • False

Question 41

Question
The L2 cache is faster and typically larger than the L1 cache, and the L3 cache is slower and typically larger than the L2 cache
Answer
  • True
  • False

Question 42

Question
Additional hardware is used to ensure that all updates to main memory via cache are reflected in all caches
Answer
  • Bus watching with write through
  • Hardware transparency
  • Noncacheable memory
  • Software transparency
  • None of the above

Question 43

Question
Each cache controller monitors the address lines to detect write operations to memory by other bus masters
Answer
  • Bus watching with write through
  • Hardware transparency
  • Noncacheable memory
  • Software transparency
  • None of the above

Question 44

Question
Only a portion of main memory is shared by more than one processor, and this is designated as:
Answer
  • Bus watching with write through
  • Hardware transparency
  • Noncacheable memory
  • Software transparency
  • None of the above

Question 45

Question
Larger blocks increase the number of blocks that fit into a cache; because each block fetch overwrites older cache contents, a small number of blocks results in data being overwritten shortly after they are fetched
Answer
  • True
  • False

Question 46

Question
A state in which data requested for processing by a component or application is found in the cache memory
Answer
  • cache hit
  • cache miss
  • cache overwrites
  • cache set
  • cache access time

Question 47

Question
The basic element of a semiconductor memory is:
Answer
  • memory cell
  • cache memory
  • RAM
  • DRAM
  • None of the above

Question 48

Question
RAID stands for
Answer
  • Random Access Integral Disk
  • Redundant Access Integral Disk
  • Random Array Independent Disk
  • Redundant Array Independent Disk
  • Redundant Access Independent Disk

Question 49

Question
Data are recorded on and later retrieved from the disk via a conducting coil named the tail
Answer
  • True
  • False
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