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Fetch decode execute
Karten in diesem Stapel (9)
- 1how does a computer carry out instructions?by fetching, decoding and executing them
- 2what happens in the fetch stage?-the first thing that happens is the PC (program counter) is checked as it holds next address of next instruction to be executed (image PC stores 0)
the values of the PC (0) is then copied into the Memo Address reg (MAR) (which will store where exactly in memory the data is read from or written to)
value in MAR (address (0)) is sent along address bus into its specified location in main memory, waiting for control unit to send signal down control bus signal to tell it what to do
assuming we want to read the data from
(0), control U sends read signal down control bus into main memory
main memory knows action needed (read) to be taken on the contents in the required memo address(0). that content in memo address (0) is sent along data bus to memo data register (where data is just stored temporarily).
we are in fetch stage (instruction waiting to be processed) so data received is sent from memo data reg to CIR
(that whole fetch segment for that specific instruction is done so we increment PC for next address) - 3what happens in the decode stage?the instructions held in the current instruction register is ready to be decoded by decoding unit.
instruction is split into OPCODE AND OPERAND. Opcode decides what needs to be done. Operand is mem location of data needed for execution or actual data to be loaded
for example a decoded instruction in mem (0) may say, load contents of mem(1) into accumulator to b held
(breaking down of code which explains What to do) - 4execute stage?Operand is copied to memo address register (this only happens if previous instruction states to fetch again NO PC INVOLVEMENT)
location data is sent down Addy bus to required location in memory
read signal is send down control bus asking contents of memo(1) is fetched.
it is then taken into MDR along data bus then the accumulator to be held
first instruction of loading is complete
cpu moves on to deal with next program counter value
THIS CONTINUES TILL PROGRAM COMPLETE - 5what affects cpu performances?Clock speeds, measured in hertz regulates how many cycles the cpu goes through per second
size of cache: memory within cpu to reduce data travel distance. when data is from or to RAM. a copy is kept in cache more cache space= more data can can be held within = higher speed
number of cores: more cores within cpu, more programs that can be run simultaneously. each core has own regs, buses units acc and alu - 6what is von neuman architectureit is a construct where both instructions and data are stored in the same memo unit. they are stored in the same format
a single control unit or processor carries out FDE cycle one at a time.
however since data and instructions are of same format, and they both use same data bus they cant be sent down at same time - 7what is harvard architecture?this is a structure in which instructions and data are held in separate memo units with their own separate buses that transport the information.
reading and writing data can be done at the same time as reading instructions - 8what are more contemporary structures?SIMD (single inst multi data)
where processor carries out a single instruction on multiple data simultaneously
MIMD (Multi inst multi data)
where multiple instructions are each carried out on multiple data simultaneously using multiple cores
distributed computing?
where multiple computers on a network each take on part of a bigger problem
its parallel processing where computers carry out multiple computations to solve problem - 9what is pipelining? positives and negativespipelining is a process of enhancing efficiency of fde cycle. while one program is being executed, the next of is being decoded, while the one after that is being fetched.
+ increases efficiency as more that one instruction can be processed simultaneous instead of waiting for 1 to complete
- cant predict what next instruction will be, one instruction could cause branch to different instruction, need to flush pipe
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- Highers computing (semester 1) Karteikarten am Fetch decode execute, erstellt von Daniel Nnajiuba am 24/08/2022.
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- Daniel Nnajiuba
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