Karteikarten
Structure & Function of the Processor
Karten in diesem Stapel (24)
- 1What is the Arithmetic Logic Unit and its Role in the CPU?> ALU
> Performs all arithmetic operations (e.g., addition, subtraction, multiplication, and division) and bitwise shifts
> Performs logical operations (e.g., comparisons)
> Computes boolean operations, e.g., AND, OR, NOT etc. - 2What is the Control Unit and its Role in the CPU?> CU
> Sends out signals to other components of the CPU (and computer)
> Follows the fetch-decode-execute cycle
> Has two key parts: the clock and decoder
> The clock coordinates the CPU's activity
> The decoder decodes program instructions - 3What is a Register?> Small amounts of extremly fast memory within the CPU
> Holds information necessary for the CPU to work
> Each register holds one small, specific piece of information (unlike RAM, which is more general)
> Registers that have one specific purpose are known as special purpose registers - 4What is the Memory Data Register?> MDR
> Holds data that has been retrieved from RAM, or that is was stored in RAM
> Data is sent from RAM via the data bus - 5What is the Memory Address Register?> MAR
> Holds the memory address of the location where data is to be stored, or retrieved from
> Sends the address to RAM via the address bus - 6What is the Current Instruction Register?> CIR
> Stores the current instruction that the CPU is working on
> Contains both the opcode and operand(s) of the current instruction
> Opcode - operation to be done
> Operand - the data affected by the operation - 7What is the Program Counter?> PC
> Holds the memory address of the next instruction to be performed by the CPU
> Usually increments by 1 every cycle, unless a branch command is used
> Address is copied to the MAR at the start of every fetch cycle - 8What is the Accumulator?> ACC
> Holds the result of any calculations and operations performed by the arithmetic logic unit - 9What is a Bus?> Peasant's way of travelling
or
> Used to send data or instructions around the CPU and to / from RAM
> A group of parallel wires that connect components in the CPU together - 10What are the 3 Main Types of Bus?> Data bus
> Address bus
> Control bus - 11What is the Data Bus?> Retrieves data and instructions from RAM
> Sits between RAM and the memory data register - 12What is the Address Bus?> Sends memory addresses to RAM
> Sits between the memory address register and RAM - 13What is the Control Bus?> Sends control signals to other components inside the system and CPU
> Ensures that everything stays synchronised - 14What Cycle does the CPU follow?> Fetch, decode, execute (FDE)
- 15What happens during "Fetch" in the Fetch-Decode-Execute Cycle?> Address of the next instruction to be processed is copied from the program counter to the memory address register
> Program counter is incremented by 1 - this points to the next instruction
> The instruction at the memory location in the MAR is retrieved from RAM, and copied into the MDR - 16What happens during "Decode" in the Fetch-Decode-Execute Cycle?> Control unit decodes the instruction in the MDR and sends the required control signals to components in the computer than need to act
- 17What happens during "Execute" in the Fetch-Decode-Execute Cycle?> The instruction is performed by the appropriate component
> This may include using the ALU, or changing the value of special purpose pregisters - 18What is Cache?> Small but extremely fast memory
> Quicker than RAM, especially since it is physically closer and does not require the address / data bus
> Stores frequently accessed data and instructions to avoid over-use of RAM
> Too much cache can actually slow the computer down, as there's more data to search through each time data is requested
> L1 cache - on the CPU, smallest, fastest, most expensive
> L2 cache - on the motherboard or CPU, larger, slower, less expensive
> L3 cache - on the motherboard, largest, slowest, least expensive - 19What is a Core?> A portion of the CPU that is capable of processing instructions independently
> Each core has its own registers and units, but shares cache and RAM
> Multiple cores allow for concurrent (simultaneous) processing of instructions
> Software must be designed to use multiple cores, or there is no performance gain - 20What is the Clock Speed of a CPU?> Measured in Hertz (Hz)
> Frequency that each portion of the FDE cycle occurs
> Determined by the speed of the CPU's clock
> A higher clock speed results in more instructions being processed - 21What is Pipelining?> Normally, parts of a core of a processor are idle while an instruction is completed
> Pipelining ensures every part of the core is being used, increasing efficiency
> Pre-fetches the next instruction and stores it in a register
> As one instruction leaves the CIR, the next one is loaded and decoded
> At any given point, the CPU is fetching one instruction, decoding another, and executing another - 22What is the Von Neumann Architecture?> Most basic CPU architecture
> Uses a single shared memory (RAM) and shared buses for both data and instructions
> Can run into bottlenecks as the instruction cannot be completed until both data and instructions have been fetched and decoded through the same bus - 23What is the Harvard Architecture?> More complex CPU architecture
> Uses two separate memory and data buses, allowing for simultaneous fetching of both data and instructions
> Expensive, so usually only used on digital signal processing machines (e.g., in medicine) - 24What is the Contemporary Architecture?> Uses aspects of both Von Neumann and Harvard
> Uses Von Neumann for the main memory - there is still a potential bottleneck
> Uses Harvard-styled arcitecture for the cache - data and instructions are fetched independently, and potentially concurrently
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- A level Computer Science Karteikarten am Structure & Function of the Processor, erstellt von Malachy Moran-Tun am 26/05/2023.
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- Malachy Moran-Tun
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