Mindmap
Design Verification

Inhalt der Mindmap
Design Verification
How to verify the correctness of your programs?
As a program's logic becomes more complex, it is increasingly important to verify its correctness
SELECTING VERIFICATION METHODS
- DEFECT PROFILE
- Defect experience
- Focus on those areas that cause you the most trouble.
- VERIFICATION EFFECTIVENESS
- You should identify a family of effective verification techniques
- Make a practice of using them
- You should identify a family of effective verification techniques
- VERIFICATION ECONOMICS
- You must learn which verification method work best for you and the conditions under which they work.
- DEFECT PROFILE
DESIGN STANDARDS
- PRODUCT CONVENTIONS
- Essential if multiple developers are to produce a system that has any external coherence
- User Interfaces
- External naming
- System error handling
- Installation procedures
- Help facilities
- Essential if multiple developers are to produce a system that has any external coherence
- PRODUCT DESIGN STANDARDS
- Calling and naming conventions
- Header standards
- Test standards
- Documentation formats
- REUSE STANDARDS
- They must be properly managed
- Think about reuse during design / design reviews
- They can substantially improve your productivity
- They must be properly managed
- PRODUCT CONVENTIONS
VERIFICATION METHODS
- SYMBOLIC EXECUTION
- It covers all symbolic values rather than merely a few tested cases
- Provides a structured and theoretically sound way to logically verify programs
- PROOF BY INDUCTION
- Applies to logical expressions with integer parameters.
- You start by showing that the logic of a program is true for a base case
- SYMBOLIC EXECUTION
VERIFYING THE OBJECT STATE MACHINE
- Check for hidden traps or loops
- Check for all possible states
- Check for state orthogonality
- Check for complete transitions
PROGRAM TRACING
- EXECUTION TABLES
- Provides an orderly way to check the logic flow in a Logic Specification Template
- You list the logic steps in order together with the variable and parameters values for each case to be examined.
- When loops are encountered, their instructions are repeated until the cycle is completed.
- You list the logic steps in order together with the variable and parameters values for each case to be examined.
- Time consuming
- Reliable
- Simple
- Reliable
- Provides an orderly way to check the logic flow in a Logic Specification Template
- TRACE TABLES
- More efficient for verifying logic correctness
- Involves three complementary techniques:
- Symbolic Execution
- Trace table examination of all possible cases
- Proof by induction
- Involves three complementary techniques:
- More efficient for verifying logic correctness
- EXECUTION TABLES
VERIFYING PROGRAM CORRECTNESS
- TESTING LOOPS
- For-loop Verification
- While-loop Verification
- Repeat-until Verification
- TESTING LOOPS
COMMENTS ON VERIFICATION METHODS
- DESIGN VERIFICATION STRATEGY
- You should design down and verify up.
- SPECIFICATION CONFORMANCE
- Consider all possible logic cases and verify that they're correctly handled.
- VERIFICATION COMPLEXITY
- Track the time verification takes and the degree to which it helps you to find design defects
- FORMAL VERIFICATION METHODS
- Best used during program design.
- Human-intensive, subject to error.
- You must practice each method until you're reasonably proficient.
- DESIGN VERIFICATION STRATEGY
Bilder und Dateien der Mindmap
Informationen
- Beschreibung
- Mindmap am Design Verification, erstellt von ALEJANDRA HEREDIA MENDEZ am 19/10/2020.
- Erstellt von
- ALEJANDRA HEREDIA MENDEZ
- Aufrufe
- 13
- Bewertung







