Mindmap
Von Neumann Architecture
Inhalt der Mindmap
Von Neumann Architecture
CPU performance
- cores
- more processes simultaneously
- clock speed
- FDE cycles /s
- cache
- frequently used in structions
- quick to access
- cores
ALU
- arithmetic logic unit
- results stored in accumulator
Control Unit
- controls data flow
registers
- MAR
- memory address register
- instruction being executed's address
- MDR
- memory address register
- fetched data value
- accumulator
- stores ALU results
- program counter
- next instruction address
- MAR
Informationen
- Beschreibung
- Mindmap am Von Neumann Architecture, erstellt von Katie Reynolds am 14/09/2022.
- Erstellt von
- Katie Reynolds
- Aufrufe
- 0
- Bewertung