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Mind map

Von Neumann Architecture

Katie Reynolds English

Map content

Von Neumann Architecture

  1. CPU performance

    • cores
      • more processes simultaneously
    • clock speed
      • FDE cycles /s
    • cache
      • frequently used in structions
      • quick to access
  2. ALU

    • arithmetic logic unit
    • results stored in accumulator
  3. Control Unit

    • controls data flow
  4. registers

    • MAR
      • memory address register
      • instruction being executed's address
    • MDR
      • memory address register
      • fetched data value
    • accumulator
      • stores ALU results
    • program counter
      • next instruction address

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Description
Mind Map on Von Neumann Architecture, created by Katie Reynolds on 14/09/2022.
Created by
Katie Reynolds
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