Mindmap
1.1.1 Structure and Function of the Processor
Inhalt der Mindmap
1.1.1 Structure and Function of the Processor
Registers
- ACC
- Stores the results of the ALU.
- ALU
- Carries out logical decisions and calculations.
- PC
- Keeps track of the current line of code, holds the address of the next instruction..
- MAR
- MDR
- CIR
- Holds the instruction to be executed.
- CU
- Decodes the instruction, sends control signals around the cpu via control bus.
- Buses
- Control
- Data
- Address
- Control
- ACC
FDE Cycle
- Fetch
- Decode
- Execute
- Store
CPU Performance
- Clock Speed
- How many FDE Cycles per second
- Measured in Hertz (Hz)
- 4GHz = 4 Billion Cycles per Second
- Cores
- Multi-tasking
- Cache
- Level 1
- Level 2
- Level 3 - Shared across cores.
- Clock Speed
Pipelining
- Efficiency
Architectures
- Von Neumann
- Harvard
- Contemporary
Informationen
- Beschreibung
- A2 Computing Mindmap am 1.1.1 Structure and Function of the Processor, erstellt von Adam Staniland am 29/09/2016.
- Erstellt von
- Adam Staniland
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