Fichas
Computer architecture: CPU, memory, BIOS and networks
Fichas del conjunto (24)
- 1Hardware architecture and functionsCentral processing unit (CPU):
consists of at least one core that contains
• Control Unit (CU):
loads an instruction and its operands (form memory) and interprets them using an instruction set. If the command is an arithmetical or logical operation it configures the ALU accordingly
• Arithmetical and Logical Unit (ALU): executes the arithmetical or logical operation
Interconnection system:
Transports instructions and data between the CPU, the memory and the I/O (Main-) Memory:
Contains the commands of a program and the corresponding data
Input / Output interconnection (I/O):
o communicates with the environment of a computer (e.g. mouse, keyboard)
o reads data and programs and outputs the processed data results - 2Principals:- The architecture describes a “stored program computer. It`s independent of the problem to solve. The program to solve a problem is stored on memory (Software).
- Program and Data is stored in the same memory and can be manipulated by the machine during execution.
- The main memory is divided into cells of equal size (bit length, e.g. 1 Byte = 8 Bit). The cells are continuously numbered (memory addresses) and can be accessed with this unique identifier.
- The program is a sequence of instructions that are executed in sequential order.
- The sequential order can be interrupted by conditional and unconditional jump instructions. Conditional jumps depend the current state of the program.
- Instructions and data are binary. - 3Typically there are five different types of instructions:- Arithmetical: add, multiply …
- Logical: compare, logical and/or/not…
- Transport: move data from/to CPU, memory, I/O
- Execution flow: (un-)conditional jumps
- CPU control: halt, no operation, … - 4CPU: Registers= CPU internal memory areas which are able to hold binary data of a CPU specific length (e.g. 8/16/32/64Bits)
• Arithmetical or logical operations can only be applied to data registers (e.g. add, …)
• The bit length of registers that point to an address (e.g. IP) determines the directly addressable memory size
• Important registers:
o Data registers are accessed by names, e.g. EAX…EDX (x86), D0…D15. They hold data (values) or memory addresses
o Instruction Pointer (IP): points to the address of the next instruction to be executed
o Instruction register: contains the operation currently executed
• The number, size (bit-length) and properties of registers are CPU architecture specific and heavily influence the performance and cost of CPUs - 5CPU: Execution cycle (one core)At the beginning of the execution of a program the instruction pointer (IP) is set to the set address of the program and points to the first instruction in memory of the program.
1. Phase: Fetch (“Abholen”)
The instruction addressed by the IP is loaded into the instruction register (IR). An
instruction consists of an operation and an address part (optional).
2. Phase: Update
The IP is incremented to point to the next instruction in memory: IP = IP + length
(length = byte length of current instruction)
3. Phase: Decode
The instruction is decoded in the CU
4. Phase: Fetch Operands
The operands of the instruction are loaded from memory into the data register
5. Phase: Execution
The ALU executes the operation with the operands. The results are stored in registers
depending on the operation. For example:
• Add: The sum of an add instruction is stored in a data register
• Compare: The result is stored in the status register, e.g. flags indicating smaller/greater/equal are set accordingly
The CPU continues with Phase “Fetch” until the program exits. - 6CPU: Binary Instructions• Operation code: Defines the operation that should be performed by the CU and ALU.
The complete list of OP-Codes that a CPU can perform is called the “instruction set”. The codes are CPU architecture specific (e.g. x86, ARM, MIPS)
• Addressing mode: Defines how an operation shall address its operands.
Typical modes are register, memory address, constant value
• Operands: Define the operands of an operation.
They are only defined if necessary for an operation. The semantics (mathematische Einheiten) depend on the addressing mode:
o Memory address mode: The operand points to a value stored in memory at the specified address (indirect value)
o Constant value: The operand directly specifies a constant value - 7CPU: binary instructions and their symbolic representation (assembler• Binary CPU instructions are hard to read for humans. Therefor the assembler language represents each operation code as a symbol
• The assembler instruction consists of
o A symbol for the operation to be performed
o Operand(s) on which the operation should be performed
• The semantics of an assembler instruction as well as the bit-length of operands are CPU architecture specific
• Examples for assembler instructions (16Bit architecture):
o ADD D0, 0x0020: Add the value 20 (hex. = 32 dec.) to the register D0
o ADD D0, $0xBD42: Add the value form memory position 0xBD42 to register D0
o MOV D15, $0x4242: Load the value from memory address 0x4242 and store it in register D4
o CMP D0, D1: Compare the register D0 and D1. The result is indicated in the status register (FLAGS for e.g. equal, greater, less)
o JL $0x1001: Jump to program address 0x1001 if the previous compare operation result is “less”. JL = ”jump to address if less”. - 8Interconnection System (Bussystem)• The bus width (parallel transmitted bits) defines how many connections (“wires”) are needed for the bus
• Data bus: bidirectional transmission of data between the components. The width normally matches the bit-length of the data registers
• Address bus: used to select the address of the transmitted data (unidirectional). The width defines the maximum addressable memory (e.g. 32bit = 4GByte)
• Control bus: controls the access to the bus (e.g. reserve, direction read/write ...) - 9Typical memory organization• Organized in cells (rows)
• Each cell has the same width (bit-length) as the data bus and CPU registers.
• A cell is selected via the address bus.
• The binary address is decoded by a row decoder. The decoder selects the corresponding cell of data in the RAM array. The selected cell is then accessible through the data bus to read/write data.
• A Precharge circuit ensures that the memory information is preserved. RAM needs to be constantly refreshed, as it leaks power and quickly loses its state if the power is lost. RAM loses power especially during read operations as the data bus draws some charge. - 10Input / Output System• Peripherals are accessed in the same way as memory cells
• Each peripheral gets a fixed memory address. The data is transmitted via the data bus
• Usually all peripherals share the same memory address space as the memory. This reduces the usable addressable memory by the address range needed for the peripherals - 11Basic Input Output System (BIOS)= Basic control logic to startup (boot) the system
• Persistently stored software in a Read Only Memory (ROM)
o Keeps its data and state during power off
o Mostly Flash-PROM (programmable ROM) with additional RAM and system clock (both battery buffered)
o Read only during normal operation
o Modern hardware allows special access to change the complete BIOS e.g. to update it in case of new basic hardware like CPUs
• Sometimes also called firmware or it is the part of a firmware responsible to start the system
• Multiple problems:
o Modern Hardware with 64bit architecture
o Security issues
o Successor (Nachfolger) of BIOS is called Unified Extensible Firmware Interface (UEFI): different concept, more complex, little advantages; but the basic functionality of booting the system is the same
• Main functions of the BIOS
o POST (Power-On Self-Test)
o Simple/initial communication with hardware
o Handover control to storage devices - 12Operating System (OS) (Betriebssystem): subsystems• I/O Management: Provides standard I/O function for applications to access and manage, e.g. mouse, keyboard, files, network access
• Memory Management
o Provides virtual memory to applications (each application “sees” only its own memory)
o Frees memory requested by applications
o Protects memory
• Process Management
o Schedules process execution (a user application runs inside a process)
o Manages the process states:
♣ Creation/Termination
♣ Ready (to run), Running, Blocked
• Hardware Abstraction Layer (HAL)
o Provides a hardware independent way to access hardware
o Uses device drivers to map hardware specifics to the standardized access - 13Summary• Hardware
o Is composed of multiple components that may come from different vendors
o Each component has a dedicated function
o The components are connected by standardized interfaces
o The CPU is a very fast calculator
• BIOS contains the logic to boot the system, as no hardware component “knows” what to do after power on
• Operating System
o Provides standardized interface for applications to access the hardware (hiding the details of hardware specifics)
o Provides higher level functions to applications (e.g. read/write file instead of raw access to memory areas on a hard drive)
o Manages process (application) execution
o Main software layer to enforce security
• Applications
o Run inside a process managed by the OS
o Use the hardware independent OS interface to interact with the hardware - 14Computer networks(Architecture, Ethernet, WWW)
• Computer networks (or data networks) connect two or more endpoints (computers) and allow them to exchange data
• Network computer devices that originate (=sender/data source), route (=data transport/deliver) or terminate (=receiver/data sink) the data are called network nodes. Nodes can include hosts such as personal computers, phones, servers as well as networking hardware
• The network nodes are connected by network links (data connections). Along these links the data is exchanged between network nodes
• Computer networks differ in the
o network topology
o transmission media of the network link used to carry their signals
o communication protocols to organize network traffic (media access, addressing, data flow, security, identification)
o size, organizational intent…
• The best-known computer network is the Internet which carries the data of the World Wide Web
• Think of networks like a superfast postal system. It allows a sender to send parcels to a
receiver. Each parcel has a standardized address field where the sender and receiver address is not - 15Wired technologies:• Coaxial (gleichachsiges) cable
widely used for cable television systems, office buildings, and other work-sites for local area networks (up to 200-500MBit/s).
• ITU-T G.hn technology (G.hn = home network)
uses existing home wiring (coaxial cable, phone lines and power lines) to create a high speed (up to 1 Gigabit/s) local area network
• Twisted pair wire
is the most widely used medium for all telecommunication. Twisted-pair cabling consist of copper wires that are twisted into pairs. Ordinary telephone wires consist of two insulated copper wires twisted into pairs and (Ethernet) computer network cabling consists of 4 pairs (2MBit/s up to 10GBit/s)
• Fiber optic
carries pulses of light that represent data. Optic fibers can be used for long runs of cable carrying very high data rates, and are used for undersea cables to interconnect continents - 16Wireless technologies:• Terrestrial microwave
• Communications satellites
• Cellular and PCS systems use several radio communications technologies.
• Radio and spread spectrum technologies – Wireless local area networks (WLAN) use a high-frequency radio technology similar to digital cellular and a low-frequency radio technology. Wireless LANs use spread spectrum technology to enable communication between multiple devices in a limited area. IEEE 802.11 defines a common flavour of open-standards wireless radio-wave technology known as Wifi - 17OSI (Open System Interconnection) and network node hardware• Layer 4-7: Gateway: Translates data between networks with different protocol types
• Layer 3: Router: Interprets and forwards an IP package to its receiver or the route to the receiver. If the receiver is not directly connected it needs to know which connected router is closer to the receiver and forward the packet to it
• Layer 2: Switch (or Bridge): Forwards an Ethernet frame form a sender directly to the receiver. Needs to interpret the MAC address to determine the receiver
• Layer 1: Network interfaces
o Network interface controller (NIC): Sends the Ethernet frames over a cable or wireless connection
o Modem: Converts a data stream between a digital network and an analogue connection (e.g. Ethernet to DSL/analogue connection)
o Repeater: Resends a bit stream without changing it. Used to extend the transmission range/cable if the signal strength decreases too much with the distance
o Hubs: Resend a bit stream to all connected nodes without changing it (bus topology, broadcast to all nodes). Hubs are used when switches are too expensive - 18Ethernet IEEE 802.x• Ethernet is the most common NIC/transmission media combination used in Local Area Networks (LAN)
• Ethernet are defined by IEEE 802.x
o IEEE 802.3 transmits data over both copper and fiber cables
o IEEE 802.11 uses radio waves (Wireless LAN standards)
o Others use infrared signals as a transmission medium or a building's power cabling (power line communication)
• In Ethernet networks, each network interface controller has a unique Media Access Control (MAC) address
o MAC address is needed for basic Ethernet communication on OSI layer 1&2
o Usually stored in the network controller's permanent memory. The IEEE maintains and administers MAC address uniqueness
o The size of an Ethernet MAC address is six octets. The three most significant octets are reserved to identify NIC manufacturers. These manufacturers, using only their assigned prefixes, uniquely assign the three least-significant octets of every Ethernet interface they produce - 19Ethernet frame• Media Access Control (MAC) address is the unique Ethernet address of the node in the local network. It consists of 6 bytes (octets) usually written as xx:xx:xx:xx:xx:xx were xx is the hex value from 0x00 to 0xff, e.g. af:00:bc:23:4f:5a
• Data: up to 1500 Byte of payload per frame (IEEE802.3)
• Frame check sequence (FCS) is a checksum. It allows a receiver to check if the content of the packed was accidently altered during the transmission
• Layer 1 transmits the Ethernet frame as an Ethernet packet adding 8+12 Bytes at the start and end of the frame. The packet is sent as a bit stream (‘0’ and ‘1’) over the physical connection (e.g. Ethernet cable, WLAN)
• Protocol efficiency: PayloadSize/PacketSize = 1542/1500 = 97,28% - 20Internet Protocol (IP)• IP address: uniquely identifies the node in a network
• IPv4 consists of four bytes (octets) and is mostly written xxx.xxx.xxx.xxx, where xxx is 0…255, e.g 192.168.171.2
• IPv6 is the newer version using six octets as address as IPv4 does not provide enough addresses for the devices in the world
• Prot: Potocol type of package, e.g. TCP, UDP - 21TCP and UDPo S#: sequence number. If the application data sent is too large for one segment, the data is split over multiple segments. The sequence number is used to restore the sent concatenate the data in the right order to restore the original data sent
o Ack#: acknowledge number. This number is sent back to the sender to confirm that a segment was received. If a segment is not confirmed within a certain time (timeout) the sender will resend that segment assuming that it was lost during transmission
o Ports are the address inside a computer. They connect the network data with an application on the node
♣ Ports are numbers 0 … 65535. 0 … 1023 are reserved and defined by IANA (Internet Assigned Numbers Authority)
♣ Reserved Port examples: 80 for HTTP (webpages), 21 for FTP (file transfer)
• User Data Protocol (UDP) packet: The packet is basically the same as the TCP packet but without sequence number and acknowledge number - 22World Wide Web• The WWW is a Hypertext-System accessible over the Internet
• A web browser requests data (e.g. web pages) from a webserver to view the content on the screen
• The web browser and webserver use the HyperText Transfer Protocol (HTTP) to communicate
o HTTP is a relatively simple protocol that uses TCP/IP
o HTTP communication steps:
♣ Connect to a webserver using TCP/IP
♣ Request data via the connection
♣ The webserver sends the requested data
♣ The connection to the webserver is closed
• URL (Unified Resource Locators)
o = unified address schema of the WWW
o Consists of a protocol specific and a common part. The common part contains the address and name of the requested object, e.g. http://www.google.com/
• Static document data (e.g. simple webpages) is described using HyperText Markup Language (HTML)
o describes text and layout of the data displayed by a browser
o is not a programming language
o HTML documents are plain text (ASCII text) and can therefore be created with any text editor
• Newer additional Standards
o Cascading Style Sheets (CSS): define the layout and look of element - 23HTML introduction• Syntax of HTML commands (often called HTML tags)
o consist of start and end tag
o keywords are embedded into “<>”
o Start tags only contain the keyword, end tags the keyword followed by “/”
Syntax: … Text ...
Example: This is the text in a paragraph
o Sometimes end tag unnecessary
o Usually written with lower case (Kleinbuchstaben), but not case sensitive - 24HTML basic tags• … surrounds the whole HTML document
• ... marks the document head
contains common information e.g. name of the author
may contain the document title ...
• ... surrounds the actual content of the document
Headlines can be decorated with “h1…7” e.g. …
Example:
This is my first HTML document
This is the text of my document.
I can write as many lines as I want between tags and don’t have to care about indentation – not like in python.
Información
- Descripción
- Fichas sobre Sin título, creado por Tim Ziegler el 29/01/2018.
- Creado por
- Tim Ziegler
- Visitas
- 0
- Valoración