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Module 5: Input/Output Systems
Fichas del conjunto (17)
- 1Four subsystems of I/OI/O connections
data transfer techniques
interface standards
interface - 2I/O ConnectionsMemory-mapped
Isolated memory - 3Memory mapped I/O (adv, dis)Adv: I/O software can access any MPU instruction
Dis: occupies RAM/ROM space - 4Memory mapped I/OI/O device appears like memory location to microprocessor
- 5Isolated memoryHas its own area (extra instruction - e.g. IN/OUT - allows instruction decoder to select I/O control line)
- 6Data transfer subsystemsAsynchronous/synchronous
Parallel/serial
Programmed/interrupt/DMA - 7Synchronous communicationSynchronised to a clock (transfer completed in known, fixed period of time)
Requires clock signal (transfer on active edge of clock) - 8Asynchronousrequires data available signal and acknowledge signals (each byte transferred individually through co-ordinating signals)
- 9Programmed I/OProgram initiates AND controls data transfer
- 10Interrupt I/OI/O initiates transfers, but INTERRUPT program controls it
- 11DMADirect memory access
MPU sets up transfer, but separate DMA hardware controls it - 12Why is matching speeds & timing difficult?MPU is a fast, parallel and synchronous bus system. I/O is slow and asychronous.
- 13How to match I/O and MPU speeds/timing?Data latched onto flip-flop by the fast MPU bus system.
Data resides in flip-flop until the I/O is ready to send it out. - 14LEDs operating current and voltage~5-50mA
~1.7V - 15How do LCDs work?Control alignment of small crystals suspended in aqueous cell by high AC frequencies.
- 16Hardware switch debounce solutionR-S flip-flop.
- 17—
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- ELE2303 Embedded Systems Design Fichas sobre Module 5: Input/Output Systems, creado por Kyan Clay el 23/03/2016.
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- Kyan Clay
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