1.1 SYSTEM ACHITECTURE

1.1 SYSTEM ACHITECTURE

1. Program Counter (PC)

   • Stores the location of the next instruction in a program waiting to be fetched

2. Memory address register (MAR)

   • stores the location for data to be fetched from or sent to memory

3. Memory data register (MDR)

   • Stores the data that has been fetched from or waiting to be sent to memory

4. Accumulator

   • Stores the result of a calculation preformed by the ALU

5. Current instruction register

   • Stores the instruction ready to decode

6. Arithmetic logic unit

   • part of a (CPU) that carries out arithmetic and logic operations in computer instruction

7. Control unit

   • works with the CPU to CONTROL THE FLOW OF DATA WITHIN THE SYSTEM and to decode instruction

8. Cache

   • Small temporary volatile memory, stores frequently used instructions, quicker fro CPU to access than main memory

9. Main memory (RAM)

   • this is the volatile memory that stores data and programs currntly in use

10. fetch-execute cycle

    • fetch
      • the processor checks the program counter to see which instruction to run next
        • the program counter gives an address value in the memory of where the next instruction is
          • the processor fetches the instruction value from its memory location
    • Decode
      • decoding the instructions in the ALU, storing the result of the CR
    • Execute
      • the instruction is performed .once this is complete, the processor goes back to the program counter to find the next instruction
        • this cycle is repeated until the program ends

11. factors affecting CPu performance

    • clock speed
      • represents the number of fetch -execute cycles per seconds
    • cache size
      • the holding area for data from the RAM stores frequently used instructions
    • number of cores
      • number of independent cores within the CPU

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