Test
CompSysArch - Part 1
Este test tiene tipos de pregunta que se abren en el reproductor de siempre.
Preguntas del test (200)
1Controls the operation of the computer and performs its data processing functions:
- AMain memory
- BI/O
- CCPU
- DSystem interconnection
2What provides storage internal to the CPU?
- ARegisters
- BArithmetic and logic unit
- CCPU interconnection
- DControl unit
3ENIAC stands for:
- AElectronical Numerical Integrator And Computer
- BElectronic Numerical Integration Analogue Computer
- CElectronic Numerical Integrator And Computer
- DElectronic Numerical Interaction And Calcuation
4How the central termination point for data channels, the CPU, and memory is called. It schedules access to the memory from the CPU and data channels, allowing these devices to act independently.
- ATransistor
- BMultiplexor
- CIntegrated circuit
- DResistors
- ECapacitors
5Expand the abbreviation VLSI
- AVery-large-scale integration
- BVery-little-scale integration
- CVery-large-scale interactions
- DVery-large-scale integrator
6Which technique allows to processor simultaneously work on multiple instructions?
- ABranch prediction
- BData flow analysis
- CPipelining
- DSpeculative execution
7Using this technique processor looks ahead in the instruction code fetched from memory and predicts which groups of instructions are likely to be processed next.
- ABranch prediction
- BData flow analysis
- CPipelining
- DSpeculative execution
8Which technique helps to processor investigates which instructions are dependent on each other’s results, or data, to create an optimized schedule of instructions
- ABranch prediction
- BData flow analysis
- CPipelining
- DSpeculative execution
9This technique enables the processor to keep its execution engines as busy as possible by executing instructions that are likely to be needed.
- ABranch prediction
- BData flow analysis
- CPipelining
- DSpeculative execution
10The world’s first general-purpose microprocessor. It was used in the first personal computer, the Altair.
- A8070
- B8080
- C8086
- D8090
11Which of the following laws deals with the potential speedup of a program using multiple processors compared to a single processor.
- AMoor’s Law
- BLittle’s Law
- CMurphy's law
- DAmdahl’s law
12The processor responds by suspending operation of the current program, branching off to a program to service that particular I/O device, known as _________________, and resuming the original execution after the device is serviced. Which of the following will be the missing word:
- Ainterrupt handler
- Binterrupt cycle
- Cdisabled interrupt
- Dinterrupt request
13What is the data line?
- Aprovide a path for moving data among system modules
- Bis used to designate the source or destination of the data on the data bus
- Cis used to control the access to and the use of the data and address lines
- Dindicates that a module needs to gain control of the bus
14What is used to manage the access to and the use of the data and address lines?
- Aaddress bus
- Bcontrol lines
- Cmemory write
- Dbus grant
- Eaddress lines
1518. Bus lines can be separated into two generic types:
- ADedicated
- BCentralized
- CDistributed
- DMultiplexed
- ESynchronous
- FAsynchronous
16PCI stands for:
- APower Control Interface
- BPeripheral component interconnect
- CProperty Casualty Insurers
- DProgrammable Communications Interface
17The methods of accessing units of data:
- ASequential access
- BPseudo access
- CDirect access
- DIndirect access
- ESingle access
- FRandom access
18What kind of memory type stores data using virtual addresses:
- ALogical
- BVirtual
- CPeripheral
- DMain
- EBuffer
19Amdahl’s law:
- ASpeed up= 1/(1 + f ) * f/N
- BSpeed up= 1/(1 - f ) * f/N
- CSpeed up= 1/(1 - f ) - f/N
- DSpeed up= 1/(1 - f ) + f/N
- ESpeed up= 1/(1 + f ) + f/N
20AMAT stands for:
- AAverage memory access time
- BAutomatic Message Accounting Transmitter
- CAsymptotic Mean Acquisition Time
- DAbsolute memory access time
21_____________ is a special purpose system that is used to perform one or few dedicated functions.
- ADistributed systems
- BEmbedded systems
- CUltra-Large-Scale Systems
- DCentralized systems
- EUbiquitous systems
22Microprocessor can’t do all the functions of a computer system on its own
- AVerdadero
- BFalso
23How many generations semiconductor memory has been through, since 1970? [blank_start]___[blank_end] (please write number)
- A13
24MIC stands for:
- Amini integrated core
- Bmany integrated core
- Cmain integrated core
- Dmany interaction core
- Emain interaction core
25Clock Frequency of SDRAM is equal to:
- A200
- B600
- C300
- D166
- E156
26An instruction pipeline increases the performance of a processor by overlapping the processing of several different instructions. How many stages it is consist of:
- A6
- B3
- C5
- D7
- E4
27_____________ is the amount of time it takes the program to perform in seconds
- AElapsed time
- BOverall time
- CEstimate time
- DExecution time
- EProcess time
28How many number systems are exist?
- A4
- B3
- C2
- D1
- E5
29Basic memory elements hold only two states: Zero / One
- AVerdadero
- BFalso
30Which of the following is the right result for this operation: 11001+110001=
- A10101010
- B10101110
- C01001010
- D01100110
- E10001010
31Convert decimal 230 to the binary:
(two of the same answers in base, changed here)- A011000110
- B011100110
- C101100110
- D011100111
32Convert binary 1100111 to decimal:
- A103
- B100
- C95
- D130
- E110
33A single, self-contained transistor is called ________.
- Aintegrated circuit
- Bmicrochip
- Cdiscrete component
- Dsingle transistor
- Esmall-scale integration
34GPU stands for:
- Agraphical processing unit
- Bgraphical performing units
- Cgraphics processing units
- Dgraphics processing utility
35What measures the ability of a computer to complete a single task?
- AClock rate
- BSpeed metric
- CClock speed
- DClock cycle
- EExecution speed
36Convert hexadecimal value: DAD to decimal:
- A3500
- B3501
- C4501
- D4500
- E3503
37Convert decimal value: 877 to hexadecimal:
- A36D
- B38A
- C36B
- D38C
- E36A
38How we call the thing that is connects major computer components (processor, memory, I/O)?
- ASystem connector
- BSystem controllers
- CSystem bus
- DSystem interconnector
39Which of the following is the result of the binary multiplication: 100010*100101=
- A11011101010
- B10111101010
- C10010001010
- D10010101010
- E10011101010
40Convert the binary value: 111011 to decimal
- A59
- B58
- C56
- D60
- E69
41DRAM stands for:
- ADirect random access memory
- BDynamic random accessible memory
- CDynamical random access memory
- DDynamic random access memory
- EDiscrete random access memory
42How is called the permanent physical defect when the memory cell or cells affected cannot reliably store data but become stuck at 0 or 1 or switch erratically between 0 and 1?
- ASoft error
- BHard error
- CHard failure
- DSoft failure
- EEpic failure
43How is called a random, nondestructive event that alters the contents of one or more memory cells without damaging the memory?
- ASoft error
- BHard error
- CHard failure
- DSoft failure
- EEpic failure
44Choose the feature(s) of third generation computer architecture (REVIEW THIS QUESTION)
- AObject-Oriented programming
- BFloating point arithmetic
- CGraphics
- DTimesharing
- EUse of cache memory
45Choose the feature(s) of second generation computer architecture (REVIEW THIS QUESTION)
- AHigh level languages
- BTransistors
- C2 Kb memory, 10 KIPS
- D2 Mb memory, 5 MIPS
- EDifferent types of supported instructions
46Choose the feature(s) of fourth generation computer architecture
- AObject-Oriented programming
- BWide spread use of data communications
- CSmallest in size
- DUse of cache memory
- EUse of drum memory or magnetic core memory
47How many generations of computer architecture are there?
- A4
- B3
- C2
- D1
- E5
48Choose the years of the first generation computer architecture
- A1958-1964
- B1964-1974
- C1974-present
- D1945-1964
- E1945-1958
49Choose the years of the second generation computer architecture
- A1945-1958
- B1964-1974
- C1974-present
- D1945-1964
- E1958-1964
50In 1976 Apple II computer model was released
- AVerdadero
- BFalso
51IBM System/360 Model 91 was introduced in 1966
- AVerdadero
- BFalso
52Choose two types of models for a computing machine
- AHarvard architecture
- BVon Neumann architecture
- COxford architecture
- DStanford architecture
53How many number systems are there?
- A1
- B2
- C3
- D4
54How a binary digit is called?
- Abyte
- Bdigit
- Ckylobyte
- Dbit
55Four bits make octal digit
- AVerdadero
- BFalso
56Three bits make hexadecimal digit
- AVerdadero
- BFalso
57Octal and hexadecimal numbers are hard on use and conversion
- AVerdadero
- BFalso
58Which digits are used in octal number system?
- A0-7
- B0 and 1
- C0-9
- DAll digits
59What does CPI stand for?
- ACycles Per Instruction
- BClocks Per Instruction
- CCycles Per Interface
- DClocks Per Interface
60What is time elapsed to program execution?
- ACPU Time
- BUser time + OS Time
- CI/O waiting & Other programs
- DCPU Time + I/O waiting & Other programs
61The execution time of a program clearly depends on the number of instructions
- AVerdadero
- BFalso
62The more clock rate of processor, the faster is processor
- AVerdadero
- BFalso
63CPU Time = I * CPI / R. Which parameter requires special profiling software?
- ACycles Per instruction
- BClock Rate
- CNumbers of instructions
- DExecution time
64Select the correct interpretation(s) of Amdahl's Law
- Ais used to compare computers' performance
- Bis used calculate the execution time of a program
- Cis used to find the maximum expected improvement
- Dit means that it is the algorithm that decides the speedup not the number of processors
65Into how many parts a program (or algorithm) which can be parallelized can be split up?
- A3
- B4
- C5
- D2
66The time interval is called a clock rate
- AVerdadero
- BFalso
67What does LRU stand for?
- ALeast Right Used
- BLast Recently User
- CLast Recently Used
- DLeast Recently Used
68Static RAM has a reduced power consumption, and a large storage capacity
- AVerdadero
- BFalso
69How a memory unit accessed by contents is called?
- AAssociative Memory
- BContent Addressable Memory
- CAuxiliary Memory
- DCache Memory
- EVirtual Memory
70Choose the access method(s)
- AParallel Access
- BIndirect Access
- CRandom Access
- DDirect Access
- ESequential Access
71ROM is the place in a computer where the operating system, application programs, and data in current use are kept.
- AVerdadero
- BFalso
72In which cache memory mapping technique any block from main memory can be placed anywhere in the cache?
- AAssociative Mapping
- BSet Associative Mapping
- CDirect Mapping
73In LRU replacement algorithm, the block that is in the cache longest is replaced
- AVerdadero
- BFalso
74In which cache memory mapping technique any memory block is mapped to exactly one block in the cache?
- ADirect Mapping
- BSet Associative Mapping
- CAssociative Mapping
75In which cache memory mapping technique any memory block mapped to subset of cache locations?
- ASet Associative Mapping
- BDirect Mapping
- CAssociative Mapping
76Which type of memory accessed via the input/output channels?
- AMain Memory
- BCache Memory
- CVirtual Memory
- DAuxiliary Memory
- ESecondary Memory
77Which type of memory stores frequently used data?
- AMain Memory
- BVirtual Memory
- CAuxiliary Memory
- DSecondary Memory
- ECache Memory
78Choose the right formula for AMAT
- AAMAT = Hit time + Miss rate + Miss penalty
- BAMAT = Hit time * Miss rate + Miss penalty
- CAMAT = Hit time * Miss rate * Miss penalty
- DAMAT = Hit time + Miss rate * Miss penalty
79Choose the definition for compulsory misses
- AOccurs if the cache cannot contain all the blocks needed during execution of a program
- BOccurs if the block placement strategy is not fully associative
- CThe very first access to a block cannot be in the cache
80Choose the definition for capacity misses
- AOccurs if the cache cannot contain all the blocks needed during execution of a program
- BThe very first access to a block cannot be in the cache
- COccurs if the block placement strategy is not fully associative
81Choose the definition for conflict misses
- AOccurs if the block placement strategy is not fully associative
- BOccurs if the cache cannot contain all the blocks needed during execution of a program
- CThe very first access to a block cannot be in the cache
82Select cache optimizations to reduce miss penalty
- AMultilevel Caches
- BGiving Reads Priority over Writes
- CWay Prediction
- DHigher associativity
83Select cache optimizations to increase the Cache Bandwidth
- ANonblocking Caches
- BMultibanked Caches
- CPipelined Cache Access
- DMultilevel Caches
- ESmall and Simple First-Level Caches
84In virtual memory, memory can be used efficiently because a section of program always loaded
- AVerdadero
- BFalso
85The advantage of virtual memory is that it takes less time to switch between applications because of additional memory
- AVerdadero
- BFalso
86Choose basic cache optimizations
- ACompiler-Controlled Prefetching
- BNonblocking Caches
- CSmall and Simple First-Level Caches
- DMultilevel Caches
- EAvoiding Address Translation during Cache Indexing
87Choose advanced cache optimizations
- AGiving Reads Priority over Writes
- BLarger Cache Size
- CHardware Prefetching of Instructions and Data
- DMerging Write Buffer
- ECritical Word First and Early Restart
88Select cache optimizations to reduce hit time (both basic and advanced)
- AAvoiding Address Translation during Cache Indexing
- BSmall and Simple First-Level Caches
- CWay Prediction
- DCompiler Optimizations
- ECompiler-Controlled Prefetching
89Physical address used by program, and which OS must translate into virtual address
- AVerdadero
- BFalso
90Process of instruction execution is divided into two or more steps, called
- Apipelining
- Bpipe stages
- Cpipe segments
- Dinstruction execution
- Epipeline hazard
91Pipelining can only be implemented on hardware
- AVerdadero
- BFalso
92Choose hazard for the following definition: different instructions in different stages (or the same stage) conflicting for the same resource
- AStructural
- BData
- CControl
93Choose hazard for the following definition: an instruction cannot continue because it needs a value that has not yet been generated by an earlier instruction
- AData
- BStructural
- CControl
94Choose hazard for the following definition: fetch cannot continue because it does not know the outcome of an earlier branch – special case of a data hazard
- AControl
- BStructural
- CData
95A technique used in advanced microprocessors where the microprocessor begins executing a first instruction before the second has been completed is called pipelining
- AVerdadero
- BFalso
96Stage in which the instruction is fetched from memory and placed in the instruction register called
- AMemory read/write
- BInstruction Decode
- CExecution
- DWrite Back
- EInstruction Fetch
97Which stage is responsible for storing and loading values to and from memory?
- AInstruction Fetch
- BMemory read/write
- CInstruction Decode
- DExecution
- EWrite Back
98How the stage in which the results of the operation are written to the destination register is called?
- AInstruction Fetch
- BWrite Back
- CInstruction Decode
- DExecution
- EMemory read/write
99In execution stage identification of the operation is performed
- AVerdadero
- BFalso
100Choose data dependences
- ARead-After-Read
- BRead-After-Write
- CWrite-After-Write
- DWrite-After-Read
101Halting the flow of instructions until the required result is ready to be used is called
- Awaiting
- Bdelaying
- Chalting
- Dstalling
102A common measure of performance for a processor is the rate at which instructions are executed, called
- ACPI
- BClock Rate
- CMFLOPS
- DMIPS
103Floating point performance is expressed as
- ACPI
- BFLOPS
- CMIPS
- DMFLOPS
104Choose the key characteristics of computer memory systems
- ALocation
- BUnit of Transfer
- CAccess Method
- DStalling
- EHazards
105Choose the key characteristics of computer memory systems
- ACapacity
- BPerformance
- COrganization
- DInstruction Fetch
- EInstruction Decode
106Choose the key characteristics of computer memory systems
- APhysical Type
- BPhysical Characteristics
- CAccess Method
- DUnit of Transfer
- EPerformance
107Word is the “natural” unit of organization of memory
- AVerdadero
- BFalso
108The “natural” unit of organization of memory is called block
- AVerdadero
- BFalso
109After implementing embedded systems, you can easily use them for another purposes
- AVerdadero
- BFalso
110Digital circuits are inflexible and slower, because they are technology dependent
- AVerdadero
- BFalso
111When using microprocessor based systems, it is enough to update the software
- AVerdadero
- BFalso
112For random-access memory, the time it takes to perform a read or write operation is called
- AClock Rate
- BCPI
- CAccess Time
- DLatency
113The rate at which data can be transferred into or out of a memory unit is called
- ATransfer time
- BTransfer Rate
- CMIPS
- DFLOPS
- EMFLOPS
114The particular block is currently being stored is called tag
- AVerdadero
- BFalso
115How many elements of cache design are there?
- A2
- B5
- C4
- D6
- E7
116Choose the element(s) of cache design
- ATag
- BLatency
- CAMAT
- DMapping Function
- EReplacement Algorithm
- FNumber of Caches
117Choose the element(s) of cache design
- ATag
- BLatency
- CAMAT
- DCache Size
- ELine Size
- FNumber of Caches
118There are three types of cache addresses
- AVerdadero
- BFalso
119There are two types of mapping functions
- AVerdadero
- BFalso
120We can find needed block in associatively mapped cache by its block address
- AVerdadero
- BFalso
121How many access methods are there?
- A3
- B2
- C4
- D5
- E6
122Choose the type(s) of auxiliary memory
- AFlash Memory
- BOptical Disk
- CHard Drive
- DSSD
- ERAM
123How many performance factors are there
- A5
- B4
- C3
- D2
- E6
124Choose the performance factor(s)
- ACache Size
- BLine Size
- CInstruction Count
- DNumber of Processor Cycles
- EMapping function
- FLatency
125Choose the performance factor(s)
- ACache Size
- BLine Size
- CInstruction Count
- DNumber of Processor Cycles
- ENumber of memory references
126Choose the system attribute(s) by which the performance factors are influenced
- ACache size
- BUnit of Transfer
- CCompiler Technology
- DProcessor Implementation
- ECache and memory hierarchy
127How many physical characteristics of disk systems are there?
- A4
- B5
- C2
- D3
- E6
128Choose the physical characteristic(s) of disk systems
- ADisk system implementstion
- BDisk Size
- CHead Mechanism
- DPlatters
- ESides
129Choose the physical characteristic(s) of disk systems
- ADisk system implementstion
- BDisk Size
- CHead Mechanism
- DHead Motion
- EDisk Portability
130What does RAID stand for?
- ARandom Array of Independent Disks
- BRedundant Array of Independent Disks
- CRedundant Array of Interoperable Disks
- DRandom Access to Independent Disks
131The RAID scheme consists of 7 levels
- AVerdadero
- BFalso
132Choose the components of SSD
- AController
- BAddressing
- CData buffer/cache
- DData size
- EMemory hierarchy
133SSD is over 10 times faster than the spinning disks in HDD
- AVerdadero
- BFalso
134SSDs are susceptible to mechanical wear
- AVerdadero
- BFalso
135SSDs are more susceptible to physical shock and vibration
- AVerdadero
- BFalso
136SSD stands for
- ASolid State Drive
- BSolid State Driver
- CSpeed State Drive
- DSpeed State Driver
137Choose the component of SSD for the following definition: provides SSD device level interfacing and firmware execution
- AController
- BAddressing
- CData buffer/cache
- DError correction
- EFlash memory components
138Choose the component of SSD for the following definition: Logic for error detection and correction
- AError Correction
- BAddressing
- CData buffer/cache
- DController
- EFlash memory components
139Choose the component of SSD for the following definition: Individual NAND flash chips
- AFlash Memory Components
- BAddressing
- CData buffer/cache
- DController
- EError Correction
140Choose the component of SSD for the following definition: Logic that performs the selection function across the flash memory components
- AAddressing
- BFlash Memory Components
- CData buffer/cache
- DController
- EError Correction
141Choose the component of SSD for the following definition: High speed RAM memory components used for speed matching and to increased data throughput
- AData buffer/cache
- BFlash Memory Components
- CAddressing
- DController
- EError Correction
142The basic element of a semiconductor memory is the memory cell
- AVerdadero
- BFalso
143How external nonvolatile memory is called?
- ASecondary memory
- BMain memory
- CCache memory
- DVirtual memory
144What is included into physical type characteristic of computer memory systems?
- ASemiconductor
- BMagnetic
- CWord
- DAccess Time
- ENumber of bytes
145What is included into performance characteristic of computer memory systems?
- AAccess time
- BCycle Time
- CTransfer Rate
- DWord
- ENumber of bytes
- FNumber of words
146What does IDE stand for? [blank_start]___[blank_end]
- AIntegrated Development Environment
147Choose the characteristics of CISC processors
- Alarge number of instructions
- Bsupport many addressing modes
- Cmore elaborate way of accessing data
- Dless number of instructions
- Einstructions are of fixed length
- Ffew addressing modes
148Choose the characteristics of RISC processors
- Aless number of instructions
- Binstructions are of fixed length
- Cfew addressing modes
- Dlarge number of instructions
- Esupport many addressing modes
- Fmore elaborate way of accessing data
149Choose the characteristics of Von Neumann architecture
- Aone memory for data and program
- BCPU provides address to get data or instructions
- Cdata and instructions must have the same width
- Dseparate busses, can be accessed simultaneously
- Eseparated buses allow one instruction to execute while the next instruction is fetched
- Fdata and instructions mustn’t have the same width
150Choose the characteristics of Harvard architecture
- Aseparate program and data memories
- Bseparated buses allow one instruction to execute while the next instruction is fetched
- Cdata and instructions mustn’t have the same width
- Done memory for data and program
- ECPU provides address to get data or instruction
- Fdata and instructions must have the same width
151Which of the following architectures differs by memory accessing?
- AVon Neumann
- BHarvard
- CComplex Instruction Set Computers
- DReduced Instruction Set Computers
152Choose the correct answer for the following characteristics: 1. Depend mainly on its peripherals 2. Used for a few dedicated functions 3. Usually used as a part of a larger system
- AMicrocontroller
- BGeneral purpose microprocessor
153Choose the correct syntax of assembly statements
- Aname operation operand(s) comments
- Boperation name operand(s) comments
- Coperation operand(s) name comments
- Dcomments name operation operand(s)
154The assembler translates names into memory addresses
- AVerdadero
- BFalso
155Name field of assembly statement is not case sensitive
- AVerdadero
- BFalso
156Choose the legal name(s) in assembly
- A@variable_name
- Bvariable?
- Cvariable&name
- Dvariable name
- E1variable
157In two-operand instruction, the first operand is source and the second operand is destination
- AVerdadero
- BFalso
158An instruction may have one or more operands
- AVerdadero
- BFalso
159In assembly language you can express data only in binary and decimal
- AVerdadero
- BFalso
160You should use a radix symbol in order to differentiate between binary, octal or hexadecimal
- AVerdadero
- BFalso
161Which symbol you should use to leave the variable uninitialized
- A?
- B!
- C@
- D$
162In assembly language, you can skip the name of variable
- AVerdadero
- BFalso
163Choose the correct syntax of variable declaration in assembly (two answers are same in base, fixed here)
- Avariable_name type initial_value
- Btype variable_name initial_vaule
- Cvariable_name type initial_valu
- Dtype initial_value variable_name
164Choose the definition of code segment in assembly
- AContains a program’s instructions
- BA block of memory to store a stack
- CAll variable definitions
165Choose the definition of data segment in assembly
- AAll variable definitions
- BA block of memory to store a stack
- CContains a program’s instructions
166Choose the definition of stack segment in assembly
- AA block of memory to store a stack
- BAll variable definitions
- CContains a program’s instructions
167There is no memory allocated for constants in assembly language
- AVerdadero
- BFalso
168Which keyword you should use in order to define a constant in assembly language
- AEQU
- BDD
- CCONST
- DEQ
- EDW
169In assembly statement name and comment are mandatory
- AVerdadero
- BFalso
170How many deadlock recovery algorithms are there?
- A4
- B3
- C2
- D5
- E1
171There are 3 approaches of deadlock avoidance
- AVerdadero
- BFalso
172There are 2 policies of deadlock prevention
- AVerdadero
- BFalso
173Choose the correct approach for the following definition "involves recognizing when deadlock has occurred, and trying to recover"
- ADeadlock detection and recovery
- BDeadlock avoidance
- CDeadlock prevention
174Choose the correct approach for the following definition "involves making dynamic choices that guarantee prevention"
- ADeadlock avoidance
- BDeadlock prevention
- CDeadlock detection and recovery
175Choose the correct approach for the following definition "adopting a static policy that disallows one of the four conditions above"
- ADeadlock prevention
- BDeadlock detection and recovery
- CDeadlock avoidance
176There are 4 approaches of dealing with deadlock
- AVerdadero
- BFalso
177Choose the correct answer for the following definition "A closed chain of processes exists, such that each process is blocked waiting for a resource held by another process in the set"
- ACircular wait
- BMutual exclusion
- CNo preemption
- DHold and wait
178Choose the correct answer for the following definition: "No process can be forced to release a resource"
- ANo preemption
- BMutual exclusion
- CHold and wait
- DCircular wait
179Choose the correct answer for the following definition "A process may hold some resources while waiting for others"
- AHold and wait
- BMutual exclusion
- CCircular wait
- DNo pre-emption
180Choose the correct answer for the following definition "Only one process may use a resource at one time"
- AMutual exclusion
- BCircular wait
- CNo preemption
- DHold and wait
181How many policy conditions for deadlock to be possible are there?
- A3
- B4
- C2
- D5
- E1
182What is the deadlock?
- APermanent blocking of a set of processes that either compete for global resources or communicate with each other
- BInterleaving of processes in time to give the appearance of simultaneous execution
- CWhen one process is inside a critical section of code, other processes must be prevented from entering that section
- DProcesses “communicate” via global counters that are initialized to a positive integer and that can be accessed only through two atomic operations
183Deadlock occurs when each process in the set is blocked awaiting an event that can be triggered only by another blocked process in the set
- AVerdadero
- BFalso
184In which of the following approaches there is no shared data?
- AMessage passing
- BMutual exclusion
- CMonitors
- DSemaphores
185Choose the correct answer for the following definition "Synchronization between processes is defined by the blocking policy attached to the sending and receiving of messages"
- AMessage passing
- BMutual exclusion
- CMonitors
- DSemaphores
186Monitors are similar to classes in java and has methods and fields
- AVerdadero
- BFalso
187In atomic operations semSignal(x) and semWait(x), what is the 'x'?
- AThe number of processes that can execute critical section
- BThe number of processes
- CThe number of monitors
- DNo correct answer
188When using semaphores, processes communicate using messages
- AVerdadero
- BFalso
189We can implement mutex through the OS or using programming languages
- AVerdadero
- BFalso
190How many approaches of mutex implementation are there?
- A3
- B4
- C2
- D5
- E1
191Choose the correct answer for the following definition "When one process is inside a critical section of code, other processes must be prevented from entering that section"
- AMutual exclusion
- BSemaphores
- CMonitors
- DMessage passing
- ECritical section
192In concurrency optimal allocation of resources is difficult
- AVerdadero
- BFalso
193In concurrency, locating programming errors can't be difficult, because the contexts in which errors occur cannot always be reproduced easily
- AVerdadero
- BFalso
194In concurrency, sharing global resources safely is difficult
- AVerdadero
- BFalso
195Concurrency offers genuine simultaneous execution
- AVerdadero
- BFalso
196Parallelism is interleaving of processes in time to give the appearance of simultaneous execution
- AVerdadero
- BFalso
197Choose the correct answer for the following definition "multiple processes on multiple systems"
- ADistributed processing
- BMultiprogramming
- CMultiprocessing
198Choose the correct answer for the following definition "multiple processes on a system with multiple processors"
- AMultiprocessing
- BMultiprogramming
- CDistributed processing
199Choose the correct answer for the following definition "multiple processes on a system with a single processor"
- AMultiprogramming
- BMultiprocessing
- CDistributed processing
200How many categories of process management are there?
- A3
- B2
- C4
- D5
- E1
Información
- Descripción
- Test sobre CompSysArch - Part 1, creado por Howard Gakes el 05/04/2021.
- Autor
- Howard Gakes
- Idioma
- English
- Visitas
- 22
- Valoración
- Aún sin valoraciones Valora este test