Flashcards
Sem título
Flashcards do conjunto (9)
- 1Central Processing Unit (CPU)- Processor
- Main Memory
- Address, Control and Data Bus
- Input/Output (I/O) Controllers - 2Control BusUsed to send control signals between each I/O controller and the processor, as well as between the processor and memory
- 3Control Bus Signals- Memory Read - causes data from the addressed location to be placed on the data bus
- Memory Write - causes data on the data bus to be written into the addressed location
- Bus Request – indicates that a device is requesting use of the data bus
-Bus Grant – indicates that the CPU has granted access to the data bus
-Clock – used to synchronize operations
-Reset – initializes all requests - 4Data Bus-Sends data between CPU components
-Is bi-directional
The width of the data bus is defined by the number of wires or lines it contains
-Bus width affects overall system performance - 5Address Bus-Sends memory addresses from the processor to the CPU components
-The width of the address bus determines the maximum possible memory addresses of the system - 6WordsMemory is divided up in equal units called words -- each word has a separate memory address; word length is usually 8, 16, 32 or 64 bits
- 7Stored Program ConceptMachine code instructions are loaded into main memory to be executed by the processor.
The instructions are fetched one at a time and executed immediately by the processor in a sequential order - 8John von Neumann ArchitectureInstructions and data are stored in a common main memory and transferred using a single shared bus
-Owing primarily to cost and programming complexity, almost all general purpose computers are based on von Neumann's principles - 9Harvard ArchitectureAn alternative model separates the data and instructions into separate memories using different buses
-Harvard principles are usually used with specialist embedded systems such as digital signal processing where speed takes priority over complexity of design
-Can be faster than von Neumann architecture because data and instructions can be fetched in parallel instead of competing for the same bus
Informações
- Descrição
- Physics Computing FlashCards sobre Sem título, criado por Giovanna Benetti em 13-02-2020.
- Criado por
- Giovanna Benetti · fev 2020
- Atualizado
- 13 fev 2020
- Visualizações
- 0
- Avaliação