1.1.1 Structure and Function of the Processor

1.1.1 Structure and Function of the Processor

1. (a) Registers

   • Arithmetic Logic Unit
     • Responsible for all logical and arithmetic decisions
   • Memory Address Register
     • Stores the address of the data to be fetched
   • Memory Data Register
     • Stores the data fetched from the MAR location
   • Control Unit
     • Manages data throughout the CPU, decoding & executing
   • Program Counter
     • Keeps track of the location of instruction next to be fetched
   • Current Instruction Register
     • Stores data of the instruction currently being decoded
   • Busses
     • Data
     • Address
     • Control
   • Accumulator
     • Stores all results of ALU calculations

2. (b) FDE cycle

   • Contents of PC copied to MAR
     • Address & Control Bus Fetch instructions from the location
       • Data bus carries it to MDR
         • MDR copied to CIR & CU
           • CU decodes the instruction
             • CU uses relevant Registers in order to Execute the instruction

3. (c) CPU Performance

   • Clock Speed
     • The amount of FDE cycles that can complete per second.
   • Cores
     • A number of microprocessors that can work together or multitask
   • Cache
     • A small amount of memory located on the CPU for fast access speed

4. (d) Pipelining

   • Efficiency
     • Starting another FDE cycle before one is finished increases efficiency as less time is taken
   • Flushing
     • When a backlog is cleared due to an instruction pointing to a location out of sequence

5. (e) Architectures

   • Von Neumann
     • Instructions and Data stored together
       • Von Neumann Bottleneck
   • Harvard
     • Separate locations for instructions and data
   • Contemporary
     • A mixture of Harvard and Von Neumann.