Flowchart
Tarea fundamentos de programación
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The CPU
The CPU contains
A number of registers
An arithmetic logic unit
The control section or control unit
Connections to the memory by two buses
Address side
Data side
Unidirectional addres bus
bi-directional data bus
Internal buses or data pathways
Allow the output of one register to connect to the input of another
The CPU registers
Memory address register
(MAR)
Stores the address to access the memory. Connects the PC with the memory
Memory buffer register
(MBR)
Stores information that is being sent to, or receive from the memory along the bi-directional data bus, conects the AC with the memory
Accumulator
(AC)
Stores data that is being worked on by the ALU, is the key register in the data section of the CPU. Needs the MBR to connect to the memory
Program counter
(PC)
Hold the address in memory of the next program instruction. Needs the MAR to be connected to the memory
Instruction register
(IR)
Receive instructions form the data
Has 2 parts
IR (opcode)
Takes the most important bits (data) of the instruction, tells the CPU what to do. Gets decoded and executed by the control unit, CU
IR (address)
Takes the least important data (bits) of the instruction for later use in the MAR. They usually forms all or part form a address
Stack pointer
(SP)
Is used to hold the address of a special chunk of main memory used for temporary storage during the program execution. Is connected to the internal address bus
All registers
Are edge-triggered-D-types.
The register comproimise more than a row of D-type latches which share a common clock input providing temporary storage on the CPU
Units in the CPU
Control Unit
(CU)
Is responsible for the timing and execution of the various register transfers required to fulfill an instruction held in the IR. It has a number of control lines coming out of it, which transmit CSL and CSP levels and pulses to the various registers and logic units
Arithmetic logic unit
(ALU)
Is responsible for bit operations on data held in the AC and MBR and for storing the results. It contains arithmetic adders. Is closely asociated with the SR
Status Register
(SR)
It is a collection of 1 bit flags that indicate the outcome of opeartions that the ALU has just carried out.
These are monitored by the CU
Carry "words" of information which are many bits wide, on diagrams the bus is indicated by a wide line or by a single line with a dash, usually is showed their width in bits.
The width has increased over time
Buses
Microcontroller
Has data bus widts of 4-bits, 8-bits, 18-bits, 32-bits and 64-bits (used by advanced computers: 64-bits)
Address
Is an space where conects the data.
The formula to now how many locations an adress have via bits: 2^n (n: address lines)
Main memory
It will comprise mostly random access memory (RAM) with some additional read-only memory (ROM) to help the machine to start up. The main memory does not reside in the CPU but sits on the mother-board and is connected to the CPU via 2 buses (the address bus works with 24 bits and the data bus is 16 bits wide).
To write or read, from memory the register transfers are written as:
MBR<---[MAR] read from memory
[MAR]<----MBR write to memory
The MAR says where is the memory
The CPU reapetedly does
FETCH the next instruction from memory into the instruction register
DECODE the instruction
EXECUTE the instruction
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- Computación Flowchart on Tarea fundamentos de programación, created by Pedro José Quesada Salas on 17/02/2019.
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- Pedro José Quesada Salas
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