Fichas
Fetch - Decode Execute Cycle
Fichas del conjunto (12)
- 1Step 1 - FetchContents of PC are transferred to the MAR
- 2Step 2 - FetchAddress bus uses THIS address to transfer into main memory
- 3Step 3 - FetchTransfer of contents uses the data bus
- 4Step 4 - FetchContents of the addressed memory location is loaded onto the MBR
- 5Step 5 - FetchIncrement contents of PC by one
- 6Step 6 - FetchContents of MBR copied to the CIR
- 7Step 7 - DecodeDecode Instructions held by the CIR
- 8Step 8 - DecodeCU decodes the instructions
- 9Step 9 - DecodeInstruction are split into opcode and operand
- 10Step 10 - ExecuteIf necessary, data is fetched/stored
- 11Step 11 - ExecuteResults may be stored in the accumulator/general purpose register
- 12Step 12 - ExecuteThe operation identified by the opcode is performed by the processor
Información
- Descripción
- A level Computing Fichas sobre Fetch - Decode Execute Cycle, creado por A J el 13/12/2021.
- Creado por
- A J
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