Main Memory

Main Memory

1. Storage Structure

   • Main Memory/RAM
     • Only storage area CPU can access directly
     • Small and volatile storage
   • Secondary Storage
     • Extension of main memory - large, nonvolatile
   • Magnetic Disks
     • Metal/glass platters covered with magnetic recording material
       • Disc surface divided into tracks, subdivided into sectors
       • Disk controller determines interaction between device and computer
       • Where programs are stored before being loaded into memory

2. Cache Memory

   • Cache
     • Temporary storage
     • Frequently accessed
     • Sits between the CPU and registers
   • Caching
     • Copying information into faster storage system
   • Cache checked first - Returns hit or miss

3. Base and Limit Registers

   • Each process has separate memory space
   • Base register
     • Holds smallest legal physical memory address
   • Limit register
     • Holds range
       • E.g.: if base register holds 300040, limit 120900, the program can access address 300040 through 420940 inclusive
         • base register + limit register = addresses accessible for given process
   • HW address protection with base + limit registers
     • CPU compares every address generated in user mode with registers
       • If program executing user in user mode tries to access OS/other user memory, a trap is generated

4. Logical vs Physical Space

   • Logical Address
     • Generated by CPU - "Virtual Address"
       • System would crash if it tried to access RAM not available - Virtual memory stops this
     • User programs only deal with logical addresses
   • Physical Address
     • Address seen by memory unit
   • Address are same in compile-time and load-time address binding
   • Addresses differ in execution-time address-binding
   • Memory Management Unit (MMU)
     • Maps virtual to physical address at RUN-TIME
       • Methods include contiguous allocation, paging, segmentation
         • Contiguous Allocation
           • Each process is contained as a single contiguous section of memory
           • MMU maps logical address dynamically
           • 'Hole'
             • Block of available memory
               • Process allocated to hole big enough
                 • 'First-fit'
                 • 'Best-fit'
                 • 'Worst-fit'
         • Paging
           • Physical address space of a process can be non-contiguous
             • Process allocated physical memory whenever the latter is available
             • Method:
               • 1. Divided phy. memory into fixed-sized blocks called Frames
                 • Size is power of 2, e.g. 512 bytes
               • 2. Divide logical memory into blocks of same size, called Pages
               • 3. Page table set up to translate logical to physical
                 • Address Translation Scheme
                   • Page Number
                     • Index into a page table containing base address of each page in physical memory
                   • Page Offset
                     • Combined with base adress to define physical memory address its been sent to
                 • Page Table
                   • Page-table base register
                     • Points to table
                   • Page-table length register
                     • Indicates size of page table
                   • 2 memory accesses - page table, and data/instruction
                 • Hierarchical page tables
                   • Contiguous memory can be wasteful for large tables e.g. 4MB
                     • Divide up page table - Multi-level paging
           • Effective Access Time and Memory Protection
             • Effective Access Time
               • EAT = (hit ratio x hit time) + ((1 - hit ratio) x miss time)
             • Memory Protection
               • Protection bit added to each frame
               • Valid-invalid bit attached to each entry in page table
                 • 'Valid' indicated page is in process' logical address space
         • Segmentation
           • A program is a collection of segments
           • Segment is a logical unit e.e.g object, stack, table etc.
             • Each segment s given a region of contiguous memory
             • Segment Table
               • Has a base (STBR) and limit (STLR)
           • Supports user view of memory
     • The relocation register value is added to every address generated by a user process
       • A user program only deals with logical addresses - Never sees physical addresses

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