The CPU Quiz

1. 1The CPU controls what the user can and cannot do.

   1. AVerdadero
   2. BFalso
2. 2Processing power depends on:

   1. AClock speed
   2. BPower supply
   3. CWi-Fi connection
   4. DNumber of cores
   5. EBandwidth
   6. FCache Size
3. 3The three main parts of the CPU include: [blank_start]the control unit[blank_end] (CU), [blank_start]the arithmetic and logic unit[blank_end] (ALU) and the [blank_start]cache[blank_end].

   1. Acache
   2. Bthe arithmetic and logic unit
   3. Cthe control unit
4. 4The control unit controls what the user can and cannot access

   1. AVerdadero
   2. BFalso
5. 5The cache is very fast memory in the CPU. Recently used applications are stored here so they are quick to access.

   1. AVerdadero
   2. BFalso
6. 6The ALU does all of the calculations. The accumulator is stored here

   1. AVerdadero
   2. BFalso
7. 7The [blank_start]program counter[blank_end] (PC) holds the [blank_start]memory address[blank_end] of the instruction for each cycle. The accumulator ([blank_start]ACC[blank_end]) stores results of the [blank_start]calculations[blank_end] in the ALU. The Memory Address Register (MAR) stores the any memory address for [blank_start]the next instruction[blank_end] to be carried out by the CPU. The Memory Data Register (MDR) stores data or instructions that have been [blank_start]fetched or waiting to be written[blank_end] to memory.

   1. Aprogram counter
   2. Bpersonal computer
   3. Cpipe cable
   4. Dnumber of programs
   5. Ememory address
   6. Fname
   7. GACC
   8. HACM
   9. IACUMLTR
   10. Jdecoding
   11. Kcalculations
   12. Lfetching
   13. Mexecuting
   14. Nall the instructions
   15. Othe previous instruction
   16. Pthe next instruction
   17. Qread and waiting to be written
   18. Rdecoded or waiting to be fetched
   19. Sfetched or waiting to be written
8. 8The fetch in the FDE cycle does:

   1. ACopy memory addresses from PC to MAR
   2. BIncrements the program counter to the address of the next instruction
   3. CCopies the instruction stored in the MAR address to the MDR
9. 9The decode in the FDE cycle does:

   1. Atranslates the instruction in the MDR
   2. Bdecodes the instruction in the MDR
   3. CCU preps for the next step
10. 10The execute in the FDE cycle performs the instruction

    1. AVerdadero
    2. BFalso

Descripción

GCSE (Computer Systems) Computer Science Test sobre The CPU Quiz, creado por Katie S el 04/05/2017.

Autor

Katie S

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English

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Creado el 4 may 2017 · actualizado el 7 mar 2018

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gcse computer sciencecomputer sciencecomputer systemsgcse

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