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Flashcards

CS219 - Quiz #5

lisel v English 102 cards

CS219 - Quiz #5

Cards in this deck (102)

  1. 1The SRAM is used forCPU internal cache
  2. 2The DRAM is used formain memory
  3. 3What is the SRAM's properties and typical access time?solid-state, volatile
    0.2 - 2.5 ns
  4. 4What is the DRAM's properties and the typical access time?solid-state, volatile
    50 - 70 ns
  5. 5What is faster, SRAM or DRAM?SRAM
  6. 6What does volatile mean?Data is lost after the power has been turned off
  7. 7What sequential circuit is used in the SRAM?an area-optimized D latch
  8. 8Does the SRAM consume more or leess area than the DRAM?more area
  9. 9How many transistors are needed to construct one cell?6
  10. 10Is the SRAM more or less expensive than the DRAM? Why?More expensive. The DRAM only requires 1 transistor and 1 capacitor (1T1C)
  11. 11What is dynamic RAM (DRAM) made up of?1T1C (1 transistor, 1 capacitor)
  12. 12How are bits stored in the capacitors of a DRAM?stored as a charge
  13. 13Why do DRAM still need refreshing?charges can leak from the capacitors, so it needs refreshing even when powered
  14. 14Is the DRAM slower or faster than the SRAM?slower
  15. 15How is the capacitors output calculated?The value inside of the capacitor is not binary (any value within a certain range). Using a threshold value, 1 or 0 will be determined based on the charge
  16. 16DRAM has ____ instruction, ______ per bit, _________ expensivesimpler instruction,
    smaller per bit,
    less expensive
  17. 17How are RAM cells organized?into rows and columns, which are accessed by strobes (electrical signals)
  18. 18What is the routine for accessing RAM cells?The CPU first activates the Row Access Strobe (RAS) to specify the row where the data lies. Then the Column Access Strobe (CAS) is activated. Finally, data goes to the output line and to its destination on the next clock tick.
  19. 19Why is the DRAM slow compared to the SRAM?It takes time to charge and discharge the capacitor
  20. 20How often does the DRAM need to be refreshed?every 64 ms or less
  21. 21How to calculate the refresh ratesystem with 2^13 = 8192 rows would require a refresh rate of one row every 7.8 microseconds (64 ms / 8192 rows)
  22. 22How does refreshing work for the DRAMDisable the chip
    Count through rows
    Read and write back
  23. 23Does refreshing have a negative impact on performance?Yes, because it takes time
  24. 24DRAM and SRAM are bothvolatile memory (power needed to preserve memory)
  25. 25Compared to the DRAM, the SRAM is10-20 times faster
    5-10 times less dense
    more expensive
    more power-hungry
  26. 26What was the first commercially successful DRAM?Intel 1103 (1024 bt)
  27. 27Did the cost of 1103 become lower or higher than magnetic core memory?lower
  28. 28T/F: The basic DRAM principle has remained the same since the first DRAM chips.True
  29. 29What are the three types of DRAM?Conventional, Fast page mode, and Extended data-out
  30. 30What is Conventional DRAM?Each bit is accessed by pulsing its row and column
  31. 31What is Fast Page Mode (FPM) DRAM?an enhancement of conventional DRAM
    the row is only selected once for all columns within the row which causes the next read and writes to not have to wait on selecting a row
  32. 32What is Extended Data-Out (EDO) DRAM??The most common type of asynchronous DRAM
    A new access cycle is started while keeping the output of the previous cycle active
  33. 33How much faster is EDO DRAM than FPM DRAM?10-15%
  34. 34What is Synchronous DRAM?DRAM synced with the CPU / memory bus clock
    CPU will not wait because it knows when the data will be ready
  35. 35What is the Burst mode in SDRAM?Accessing the stream of data is done in bursts, the first access is done slowly but then subsequent accesses are faster (12, 10, and 8 nanoseconds)
  36. 36What is internal interleaving?Separating the memory banks of odd and even addresses, which allows next bye access while current byte refresh
  37. 37What is the most common type of desktop DRAM?SDRAM
  38. 38Who developed the DDR SDRAM?JEDEC (an industry alliance for DRAM standardization)
  39. 39What is the difference between DDR SDRAM and normal SDRAM?DDR (Double Data Rate) SDRAM has a higher bandwidth than normal SDRAM, data is transferred on both the rising and falling edges of the clock
  40. 40What does the number stand for after DDR? (DDR2, DDR3, etc.)The number of prefetch buffer bits
  41. 41What happens as the size of the prefetch buffer increases?bandwidth increases, power consumption decreases, and heat dissipates
  42. 42What is the LPDDR?the lowpower version of DDR DRAM which has a smaller form fact and less power consumption
  43. 43What is a SIMM? (DRAM Form Factor)Single In-line Memory module
  44. 44How does a SIMM work?it is installed in pairs, where a single pin contact covers both sides of the module
  45. 45How does a DIMM (Dual In-Line Memory Module) work?this is more common, and goldfingers carry separate signals on both sides
  46. 46What is a Small Outline DIMM used for?for notebooks
  47. 47What is ROM? Is it non-volatile or volative?ROM: Read only memory
    Non-volatile
  48. 48What does non-volative mean?The data or program is stored permanently in main memory
  49. 49What are some of the applications of ROM?microprogramming, function tables, library subroutines, systems programs
  50. 50What is the difference between ROM and programmable ROM? (PROM)PROM needs special equipment to run the program
  51. 51How does the Erasable Programmable ROM work? (EPROM)data is erased by UV (up to 20 min)
  52. 52IS EPROM more or less expensive than PROM?more expensive
  53. 53What is electrically erasable ROM? (EEPROM)only selected bytes are updated
  54. 54Does it take longer to write or read in EEPROM?much longer to wrote (100s of microseconds)
  55. 55Compared to the EPROM, the EEPROM ismore expensive than the EPROM, and less dense
  56. 56How does flash memory work?Electrically erased and reprogrammed, has a fast read (45+ ns) but a slow write
  57. 57What is the cost of flash memory compared to EEPROM?far cheaper
  58. 58What was flash memory inspired by?Hot-carrier injection where electrons get trapped in the transistor's control gate when it gets worn out
  59. 59Does flash memory need to refresh?No
  60. 60What are the two flash types?NOR and NAND
  61. 61What is NOR flash designed for and how is it used?Byte-addressability and PC's systems programs
  62. 62What are the pros and cons of NOR flash?higher speed but expensive
  63. 63What is the NAND flash designed for and how is it used?designed for block access and used for block access devices such as SSD, SD card, and USB thumb drives
  64. 64What are the pros and cons of the NAND fash?SSDs, SD card, USB thumb drives
  65. 65What are the next-gen NVMs?What are the next-gen NVMs?
  66. 66What is a STT RAM and how does it work?it is a Spin-Transfer Torque RAM, which is a magnetic RAM (MRAM)
    programs bit using spin value of a charge
  67. 67What is PC RAM and how does it work?Phase change memory ram that stores bit using a material state change between amorphous (high resistance) and crystalline (low resistance) phase
  68. 68How are bits programmed in a PCRAMinducing high temperature
  69. 69What is the ReRAM?storing bit by material with changing resistance
    an electric current is applied to change resistance value
    the bit value is read measuring resistance
  70. 70What are magnetic disks?circular platter constructed of nonmagnetic material substrate and is coated with magnetizable material
  71. 71Why did magnetic disk substrate change from aluminum to glass?improved surface uniformity, reduced surface defects (less read/write errors), lowered flight heights
  72. 72What was the first hard drive?IBM 305
  73. 73How are read and write mechanisms recording?done with a conductive coil called a head (can be a single r/w head or separate for read and write)
  74. 74How does a write work?Sending a current through the coil produces a magnetic field, where the pulses are sent to the head. The magnetic pattern is recorded on the surface below
  75. 75How does a read work?With a separate read head that is shielded by a magnetic resistive sensor, a current is passed through. Resistance changes are detected as voltage.
  76. 76The electrical resistance in a read depends onthe direction of the magnetic field
  77. 77Read is high or low frequency operation?High frequency operation (higher storage density and speed)
  78. 78The head mechanism is located ata fixed distance above the platter
  79. 79What is a flying head?A head mechanism that uses air cushion. The size of the air gap is a trade off between data density and failure. More density can be achieved as the head gets closer to the platter, but there is a higher risk of error.
  80. 80Does the flying head come into contact with the platter?No. The head rests on the surface when the disk isn't rotating. When the disk rotates, the air pressure will float to the head.
  81. 81What should be done with the air pressure to prevent catastrophic failure?Air pressure should be matched to the environment
  82. 82What should the gap (floating / flying height be)?Less than 0.5 microinches
  83. 83Can the head touch the surface?Yes, with sliders it can survive 50,000 landings/takeoffs
  84. 84What is the disk layout?1) 1 or more platters on a spindle
    2) thousands of tracks on a surface
    3) hundreds of sectors within a track
    4) cylinders formed from aligned tracks
  85. 85What is the fixed sector size?512B
  86. 86What is the minimum block size?One sector
  87. 87What does Multiple Zone Recording (MZR) do and how does it work?Increases disk capacity by putting more sectors on the outer tracks
  88. 88Typically how many zones are there?16
  89. 89What problem does Shingled Magnetic Recording (SMR) fix and how does it fix it?Problem: write head can't be made smaller, but read can
    Solution: Overlap writes between tracks
  90. 90Individual disk blocks can be physically located byCyliner-Head-Sector (CHS) number combination
  91. 91Is the CHS scheme directly visible to software?Yes
  92. 92Is CHS-based addressing still used?No, it no longer corresponds to true disk geometry
  93. 93What is used now instead of CHS?Logical Block Addressing (LBA) scheme where there is a simple linear address starting from block #0
  94. 94What is the process for reading/writing to a sector?1) Move the arm to the correct track (seek)
    2) Wait for the desired sector to line up with the head
    3) Transfer data from the sector
  95. 95What are the three facts that affect disk speed?Seek time, Rotational delay, and Transfer time
  96. 96What is seek time and how long is it?Mechanical head movement between tracks, which can take 5-10 ms between random tracks and <1 ms with consecutive tracks
  97. 97What is rotational delay?The time is takes for the beginning of the sector to reach the head
  98. 98How do you find the average rotational delay?(1/2) * (second/1 rotation)
  99. 99What is the transfer time?It depends on linear density and rotation speed?
  100. 100What two factors dominate access latency?Seek time and rotational delay
  101. 101Does random access hurt performance?Yes
  102. 102—

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Flashcards on CS219 - Quiz #5, created by lisel v on 20/11/2018.
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