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02 Handout 1

Eljin Aguilar Computer Architecture & Organization normal English 88 cards

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  1. 1defines the details of how a set of software and hardware technology standards interact to form a computer system, also known as a platform.Computer architecture
  2. 2This type of computer architecture involves all the hardware components of a system, such as the central processing unit (CPU) and memory controllers.System Design
  3. 3This type of computer architecture involves the embedded programming language of a CPU, which defines its functions and capabilities.Instructional Set Architecture
  4. 4This is also known as computer organization. This architectural type covers the data paths, data processing and storage, as well as the data implementation in an instructional set architecture.Microarchitecture
  5. 5Computers with this architecture can be termed as control-flow computers, which follow a step-by-step program that governs all operations.Von Neumann Architecture
  6. 6In assembly language, this pertains to a microprocessor that has the capability to execute a 32-bit instruction set.x86 architecture
  7. 7is a prevailing offline emulator of Intel 8086 microprocessor with 8086 assembler, which is also compatible with Advanced Micro Devices (AMD), disassembler, source editor, and an emulator with debugger.Emu8086
  8. 8runs programs on Virtual PC. This completely blocks a program from accessing real hardware since the assembly code runs on a virtual machine, which makes debugging easier.Emulator
  9. 9This may subsequently be used as an address or as data in another instruction's address.Label
  10. 10This is the name of the operation or function of the assembly language statement which may correspond to any of the following: Machine instructions, Assembler directives, Macro Definition.Mnemonic
  11. 11This identifies an immediate value, a register value, or a memory location.Operand
  12. 12This begins with a semicolon ( ; ) which signals the assembler that the rest of the line is a comment and must be ignored by the assembler.Comment
  13. 13are internal memory storage locations which do not require memory access and speed up the processor.Registers
  14. 14used for input/output (I/O) operations and in most arithmetic instructions.AX: Primary accumulator
  15. 15used in indexed addressing.BX: Base register
  16. 16stores the loop count in iterative operations.CX: Counter register
  17. 17used in I/O operations and for multiplying and dividing large values.DX: Data register
  18. 18stores the offset address of the next instruction to be executed.IP: Instruction pointer
  19. 19provides the offset value within a program stack.SP: Stack pointer
  20. 20used in referencing parameter variables passed to a subroutine.BP: Base pointer
  21. 21used as source index for string operations.SI: Source index
  22. 22used as destination index for string operations.DI: Destination index
  23. 23This contains the control flags that manage the operating mode and status of the processor.CR0
  24. 24indicates the overflow of a high-order bit of data after a signed arithmetic operation.Overflow Flag
  25. 25determines the direction (left or right) for moving or comparing string data.Direction Flag
  26. 26enables or disables external interrupts.Interrupt Flag
  27. 27sets the operation of the processor to single-step mode.Trap Flag
  28. 28shows the sign of the result of an arithmetic operation, indicated by the leftmost bit.Sign Flag
  29. 29indicates the result of an arithmetic or comparison operation.Zero Flag
  30. 30contains the carry of an arithmetic operation from bit 3 to bit 4.Auxiliary Carry Flag
  31. 31involves the total number of 1-bit in the result of an arithmetic operation.Parity Flag
  32. 32contains the carry of 0 or 1 from a high-order bit after an arithmetic operation.Carry Flag
  33. 33This is a reserved control register.CR1
  34. 34This involves the page fault linear address.CR2
  35. 35This enables the processor to translate a linear address into physical address by locating the page directory and page tables for the current operation.CR3
  36. 36is used to define logical memory partitions subject to access controls.Segmentation
  37. 37are specifically defined areas in a program for containing instruction codes, data elements, or program stacks.Segments, also known as memory segments
  38. 38The size of this memory section is determined before a program runs. It contains all the instructions to be executed.Code memory segment
  39. 39This contains the data elements that can be used in the program.Data memory segment
  40. 40This holds the data and return addresses of procedures or subroutines in a program.Stack memory segment
  41. 41denotes the segment that holds the instruction being executed.A 16-bit CS register stores the starting address of the code memory segment.CS: Code segment register
  42. 42specifies the segment containing the data, the constant, or the work area for a program.DS: Data segment register
  43. 43refers to the segment that contains a user-visible stack.SS: Stack segment register
  44. 44is a spare segment register that may be utilized for storing data.ES: Extra segment register
  45. 45it is stored as part of the instruction set. It usually represents the number of address locations added to a base address in order to obtain specific addresses.Offset
  46. 46Nibble : Byte: Word:Nibble : 4
    Byte: 8
    Word: 16
  47. 47A signed binary value contained in a byte, word, or doubleword using 2's complement representation.Integer
  48. 48An unsigned integer contained in a byte, word, or doubleword.Ordinal
  49. 49A representation of a BCD digit wherein two (2) digits are stored per byte (8-bit).Packed BCD
  50. 50A representation of a BCD digit wherein one (1) digit is stored per byte (8-bit).Unpacked BCD
  51. 51This contains a 16-bit offset addressing information from the current segment.Near Pointer
  52. 52This contains a 32-bit of addressing information which is composed of a 16-bit segment register value and a 16-bit offset value.Far Pointer
  53. 53It is a continuous sequence of bits in which the position of each bit is considered as an independent unit.Bit Field
  54. 54It is a continuous sequence of bits containing zero (0) up to the number of bits in the string less one.Bit String
  55. 55It is a data type that encompasses decimal points that are not considered as fixed point numerals.Floating Point
  56. 56This is a set of data types that were introduced to the x86 architecture as part of the extensions of the Intel 8086 instruction set to optimize the performance of multimedia applications.Packed SIMD
  57. 57This pertains to the way in which the operand of an instruction is specified. The information contained in the instruction set can either be the value of the operand or the address of the operand or result.Addressing Modes
  58. 58This is the simplest addressing mode wherein the operand is an immediate value stored explicitly in the instruction.Immediate addressing
  59. 59This requires only one (1) memory reference and no special calculations needed.Direct memory addressing
  60. 60This mode encompasses an address field referring to an address of a word in memory, which in turn contains a full-length address of the operand.Indirect memory addressing
  61. 61This mode involves an address field referring to a register containing the operand.Register addressing
  62. 62In this mode, the address of the operand is placed in a register.Register indirect addressing
  63. 63This is considered a very powerful mode of addressing since it has the combined capabilities of direct memory addressing and register indirect addressing.Displacement addressing
  64. 64This mode is a form of implied addressing. The machine instructions need not include a memory reference, but implicitly operate on a stack that is a linear array of locations.Stack addressing
  65. 65defines the layout of the bits of an instruction, in terms of its constituent fields.Instruction format
  66. 66A processor characterized with a rich instruction set providing a variety of features, such as the ability to load operands from the immediate byte(s) that provides the value of an 8,16, or 32-bit operandComplex Instruction Set Computer (CISC): Variable length instructions
  67. 67A processor having fewer number of instructions that individually performs a simpler task.Reduced Instruction Set Computers (RISC): Fixed length instructions
  68. 68are the core of any assembly language program.Statements
  69. 69These are executable instructions that instruct the processor what to do. Note that each executable instruction generates one machine language instruction. These are also known as operational codes or opcodes.Machine instructions:
  70. 70These non-executable commands direct the assembler about the various aspects of the assembly process. These do not generate machine language instructions.Assembler directives
  71. 71It is a section of code that programmers write once, and can be used many times. It encompasses a text substitution mecMacro Definition
  72. 72may contain the operand for any opcode, which can be assigned to a variety of functions. In some cases, their use within the instruction set is orthogonal to the operation.General-purpose registers
  73. 73it contain bits that manage the operation of the floating-point unit including the type of rounding controlControl registers
  74. 74A segmented memory model divides the system memory into independent groups, calledsections
  75. 75This section is commonly used to declare data memory segments that remain static throughout the program..data
  76. 76This section contains buffers for future data declaration during the program execution..bss
  77. 77they work together with general-purpose register to access any memory value (Tutorialspoint, n.d.).Segment registers
  78. 78This determines which addressing mode is to be used. Note that, one (1) or more bits in the instruction format can be used as a mode field.Mode field
  79. 79In a system without any virtual memory (VM), this can either be the main memory address or a register. For computers with VM, the effective address is a virtual address or a register.Effective address
  80. 80This performs the actual mapping of a physical address that is not visible to programmers.Memory management unit
  81. 81is a reserved block of locations, wherein items are appended to the top of the stack so that the block is partially filled at any given time.The stock
  82. 82is the most basic design related matter that can be encountered by programmersThe instruction length, or instruction format length
  83. 83that can contain an instruction prefix, segment override, operand size, or an address size;a prefix field
  84. 84it can be 1, 2, or 3 bytes in length;opcode field
  85. 85that specifies if an operand is in a register or in memory;the ModR/M
  86. 86which provides addressing information to fully specify the addressing mode;o the SIB (scale, index, and base filed)
  87. 87which when used, an 8, 16, or 32-bit signed integer displacement field is added;o the displacement byte(s),
  88. 88that provides the value of an 8, 16, or 32-bit operand.immediate byte(s)

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normal Computer Architecture & Organization Flashcards on 02 Handout 1, created by Eljin Aguilar on 03/08/2025.
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Eljin Aguilar
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