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Mind map

Main Memory

Artur Assis Operating Systems Superior Portuguese

Main Memory

Map content

Main Memory

  1. Background

    • A program must be loaded into memory to be executed
    • CPU have direct access only to registers and main memory
    • What does memory unit see?
      • Stream of
        • Address + read request
        • Address + write request
    • Time to access
      • Registers
        • ~1 clock cycle
      • Main Memory
        • Multiple clock cycles
          • May generate stalls
    • Cache
      • Managed by hardware
      • Memory between CPU and main memory
      • Faster than main memory, slower than registers
    • Protection of memory
      • It ensures that each program only accesses segments of main memory that are allowed to them.
  2. Memory Protection

    • Mechanism to make sure that each process will access only the segments of memory to which they are allowed
      • Pair of registers that define the logical address space of a process: BASE and LIMIT
    • Algorithm
      • OBS.: loading base and limit register requires high privilege
      • CPU checks if the memory access generated in user space is valid.
  3. Address binding

    • Source code
      • Define symbols
        • Ex.: name of a variable , name of a function
      • Accessible at compile time
    • Compiled code
      • Bind symbols from source code to Relocatable addresses
        • Ex.: N bytes from the beginning of this module
      • Accessible at load time
    • Linked and loaded code
      • Bind relocatable addresses to absolute logical (?) addresses
        • Ex. : <base_address> + N
      • Accessible at execution time
  4. Address space

    • Physical
      • Seen by the memory unit
    • Logical (virtual address)
      • Seen by the CPU
    • Memory Management Unit
      • Translates logical address, from CPU, to physical address for the physical memory
      • Ex.
      • Not all systems have MMU. Less complex systems, like embedded systems, do not have MMU.
  5. Dynamic Loading

    • Load the routines of the program only when they are called
    • Routines on disk in relocatable load format
  6. Linking

    • Dynamic
      • Linking happens in execution time
        • Stub
          • Small piece of code used to locate the appropriate memory-resident library routine. It replaces itself with the address of the routine and executes the routine.
    • Static
      • system libs + program code = binary program image
  7. Partitions

    • Operating Systems maintain information about: (a) - allocated partitions and (b) - free partitions.
    • Dynamic Storage-allocation problem: satisty a request of size N from a list of free holes
      • First-fit
        • Allocate the first hole that is big enough
      • Best-fit
        • Allocate the smallest hole the is big enough
      • Worst-fit
        • Allocate the largest hole.
      • The first-fit and best-fit strategies are usually better in terms of speed and storage than worst-fit
    • Fragmentation
      • External
        • Total memory is sufficient to satisfy a request but it is not contiguous.
      • Internal
        • Allocated memory is larger than what is actually used.
  8. Paging

    • It is a technique in which the physical memory is divided into fixed-size blocks (frames) of 512 B to 2 MB and logical memory into fixed-size blocks (pages).
      • Make it possible for the program to be loaded even if no contiguous physical memory space is available but the total space is available.
        • Ex. A program of size N pages needs N free frames to be loaded.
    • Address Translation
      • Page Table
        • Translates logical addresses to physical addresses.
        • It may is stored in main memory, but it is inefficient. It is better to be assisted by a cache (TLB).
        • Each process will have its own page table
          • It allows using random addresses to make it harder to find the final physical address, something good for security.
        • Implementation
          • Registers
            • Page-table Base Register
              • Points to the table
            • Page-table length register
              • Size of the table
          • Cache
            • Translation Look-aside buffer (TLB) or (Associative Memory)
              • TLB entry
                • Uniquely identify each process to provide address space protection to that process
              • Greater TLBs are better because they avoid miss.
        • Structure
          • Strategies
            • Hierarchical Paging
              • The idea consists of using multiple levels of page table.
                • OBS.: Caches should be used to avoid multiple main memory accesses
              • Ex. 1
                • Ex. 2:
            • Hashed Page Table
            • Inverted Page Tables
      • Logical Address
        • Page Number
          • It is an index for a base physical address of each page in page table.
        • Page Offset
          • With the base address, it defines the physical memory
      • Ex. 1
        • Ex. 2
          • Ex. 3 (with TLB)
  9. Effective Access Time (EAT)

    • Hit Ration
      • % of times that a page number was found in TLB.
    • ETA = <Hit Ratio> x <Mean time to access memory> + <Miss Ratio> x 2 x <Mean time to access memory>
      • OBS.: When a miss happens, it is necessary to access the memory twice. One to get information from page table and other to read/write from the memory
  10. Protection

    • A protection bit is associated with each frame, indicating read/write or other kind of operation is allowed. A violation results in a trap to the kernel.
    • Valid-invalid bit
      • VALID: Indicate that the associated page is in the process' logical address space
      • INVALID: indicate that the associated page is not in the process' logical address space
  11. Swapping

    • It is the process to move a process/page from main memory to a secondary memory temporarily.
    • Ex. of process swapping:

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Description
Superior Operating Systems Mind Map on Main Memory, created by Artur Assis on 16/06/2022.
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Artur Assis
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