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Architecture of the CPU
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Architecture of the CPU
CPU
- (ALU) Artihmetic logic unit
- the ALU basically does all the calculatons
- completes all simple addition and subtrcton
- it performs logic operations such as and, or and not. and binary shift
- it contains the accumulator register
- control unit (CU)
- the control unit is in overall control of the CPU. its main job is to manage the fetching, decoding and execution
- it controls the flow of data inside the cpu and outside the CPU
- Cache
- the cache is very fast memory in the CPU. its slower than the registers but faster than ram
- it stores regularly used data so that the CPU can access it quickly the next time its needed
- Cache have very low capacity and are expensive compared to ram and secondary storage
- there are different levels of cashe memory L1 L2 L3. L1 is the quickest but has the lowest capcity
- Von Neumann Architecture
- MAR
- holds any memory address about to be used by the cpu. the address might point to data or a cpu instruction
- MDR
- the memory data register holds the actual data or instruction. This may have been fetched from memory, or be waiting to be written to memory
- MAR
- (ALU) Artihmetic logic unit
Protocol layers
- Protocols
- TCP/IP
- communication over a LAM/WAN
- HTTP
- Web Page Requests
- HTTPS
- Web Page Requests
- FTP
- File Transfers
- POP3
- IMAP
- SMTP
- TCP/IP
- Protocols
Information
- Description
- Mind Map on Architecture of the CPU, created by Finn Davies on 10/04/2022.
- Created by
- Finn Davies
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