Quiz
Ch 9 True/False
Create a free account to finish this quiz
Save your progress and see your final score.
Already have an account? Sign in
Questions in this quiz (13)
1A relocation register is used to check for invalid memory addresses generated by a CPU.
- ATrue
- BFalse
2Reentrant code cannot be shared.
- ATrue
- BFalse
3There is a 1:1 correspondence between the number of entries in the TLB and the number of entries in the page table.
- ATrue
- BFalse
4Hierarchical page tables are appropriate for 64-bit architectures.
- ATrue
- BFalse
5The ARM architecture uses both single-level and two-level paging.
- ATrue
- BFalse
6Fragmentation does not occur in a paging system.
- ATrue
- BFalse
7Hashed page tables are particularly useful for processes with sparse address spaces.
- ATrue
- BFalse
8Inverted page tables require each process to have its own page table.
- ATrue
- BFalse
9Without a mechanism such as an address-space identifier, the TLB must be flushed during a context switch.
- ATrue
- BFalse
10A 32-bit logical address with 8 KB page size will have 1,000,000 entries in a conventional page table.
- ATrue
- BFalse
11Hashed page tables are commonly used when handling addresses larger than 32 bits.
- ATrue
- BFalse
12The x86-64 bit architecture only uses 48 of the 64 possible bits for representing virtual address space.
- ATrue
- BFalse
13Mobile operating systems typically support swapping.
- ATrue
- BFalse
Information
- Description
- Computer Science Quiz on Ch 9 True/False, created by Storm Davis on 26/04/2019.
- Author
- Storm Davis
- Language
- English
- Views
- 7
- History
- Created on 26 Apr 2019 · updated on 26 Apr 2019
- Tags
- Rating
- No ratings yet Rate this quiz