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System Architecture

• Central Processing Unit (CPU)
  • Fetch, decode, execute
    • Address generated by Program Counter (PC)
    • Address carried to Memory Address Register (MAR) by the Address Bus
    • PC updates and stores next memory address for next cycle
    • Data/instruction under the given address is delivered by the Data Bus to the processor and stored in the Memory Data Register (MDR)
    • The data is decoded, most key results are whether it is data or an instruction
    • Central Processing Unit (CPU) executes instructions
    • Instructions regarding input or output devices are executed by the Control Unit (CU)
    • Calculation instructions are executed by the Arithmetic Logic Unit (ALU)
    • Results of calculations in the ALU are stored Accumulator
  • Parts of the CPU
    • Memory Address Register (MAR)
      • Stores the memory location of data that needs to be accessed
    • Memory Data Register (MDR)
      • Stores the data that is being transferred to and from memory
    • Program Counter (PC)
      • Stores the address of the next instruction to be executed
    • Accumulator (AC)
      • Stores results from calculations
    • Arithmetic Logic Unit (ALU)
      • Carries out calculations and make decisions on the data sent to the processor
    • Control Unit (CU)
      • Controls how data moves through the processor and controls the timing of operations and the instructions sent to the processor and the input and output devices (|/O devices)
• Memory and Storage
  • Primary Memory
    • Random Access Memory (RAM)
      • Holds the data and instructions which the computer is currently using and acts as a buffer to the secondary memory.
      • Volatile
        • Data is lost when the power source is removed
    • Read Only Memory (ROM)
      • This is stored in a chip directly connected to the CPU through dedicated busses and is read only