Computer organisation and architecture

Computer organisation and architecture

1. Processor

   • The brain of the system. Responsible for executing programs and supervising the functioning of the other parts of the system.
   • Processor speed is given in hertz
     • Mhz - One millioin instructions per second
     • GHz - One billion instructons per second
   • Arithmetic logic unit (ALU)
     • Carries out arithmetic operations such as addition, multiplication etc.
     • Can also make logical comparisons between items of data such as determining whether ne value is greater than another.
       • Such logical operations can also be performed on non-numeric data.
     • The result of the ALU is held in a register called the accumulator.
   • Control unit (CU)
     • Governs the operation of all hardware, including input and output devices and the CPU.
       • It does this by fetching, interpreting and executing each instruction in turn, in an automatically controlled cycle.
   • Clock
     • Regulates all of the actions that take place.
     • Provides a regular pulse of high voltage followed by low voltage.
       • Each high-to-low transition is known as a cycle, and each cycle implements an instruction
   • Program counter (PC)
     • Sometimes called the accumulator, holds the address of the next instruction to be executed.
     • When a sequence of instructions is to be executed the PC is automatically incremented to point to the next instruction.
     • Depending on the length of the current instruction, 1, 2 or 3 has to be added to its contents unless the current instruction is a jump, in which case the destination address is used if the test is successful.
   • Registers
     • General-purpose registers (AX, BX, CX, and DX)
       • Used for performing general arithmetic functions.
       • Have no pre-defined role by the chip designer and as a result can be manipulated by a computer programmer to perform the role of any other registers
     • Memory buffer register (MBR)
       • values about to be added or subtracted can be copied, via the memory buffer register, sometimes called the memory data register (MDR), into the accumulator.
         • The arithmetic result can be placed in one accumulator copied from there into a main memory location.
       • All communications between the CPU and the memory take place through the MBR.
     • Memory address register (MAR) and current instruction register (CIR)
       • In order to fetch an instruction from memory, the CPU places the address of the instruction in the memory address register and then carries out a memory read.
         • From here, the instruction is copied into the MBR and from there into the CIR.
           • This same process occurs if an instruction itself requires the reading of a particular data word. The data word goes through the same cycle as the instruction itself (eventually being copied into the MBR where it can be accessed by the processor).
     • Status or flag register (SR and FR)
       • Also known as the processor status register (PSR), contains bits that are set or cleared based on the result of the last instruction.
         • These flags determine the operation of the processor depending on the result of the previous action
       • Also handles interrupts to signal to the control unit.

2. Main memory

   • Memory that is directly addressable by the processor.
     • The simplest part of the computer. In von Neumann computers it is used to as a store for the program instructions and data.
     • Each byte goes into a seperate part of the chip (memory location). Made up of RAM chips but can also include one or more ROM chips.
     • RAM
       • Random Access Memory - used for memory that is both readable and writable.
       • Used by the processor to both store (write) and load (read).
       • Volatile - the contents are forgotten when the power is turned off
     • ROM
       • Read Only Memory - provides random access like RAM but cannot cannot be written to, only read from.
       • Used to store fixed programs such as the bootstrap program on a PC
       • Non volatile - doesn't forget the contents when the power is turned off.
     • Cache memory
       • Holds frequently accessed code and data.
       • Extremely fast and accessed by the processor so that it doesn't need to access main memory where there is a delay where the instruction is copied
         • This limits the size of how much data can be cached so cache memory is often very small (often just megabytes).

3. Address bus

   • A unidirecional bus used to address memory and I/O locations.
   • The components watch the data bus until an address that they recognise is present.
     • When this happens, the computer either retrieves the data from the data bus or places new data onto the data bus for the CPU to use.

4. Data bus

   • A bidirectional bus used to transport data between the three components of the three box model.
   • Carries the data being exchanged around a system in their binary form.
   • Likely to have the largest word size as actual information will be the majority of the data that needs to be sent vi the bus. The other buses will determine how and where the data will be stored and processed.

5. Control bus

   • A bidirectional bus used to transport control signals that regulate data flow round a system.
   • Concerned with timing operations such as memory writing, memory reading and I/O operations. All signals on a bus follow strict timing sequences, some operations take longer than others.

6. I/O controllers

   • Used to translate signals from I/O devices into bits for the processor to understand.
   • Provide the interface between the ports and the motherboard (and the rest of the computer).